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Message-ID: <1441705796-11365-2-git-send-email-bayi.cheng@mediatek.com>
Date: Tue, 8 Sep 2015 17:49:54 +0800
From: Bayi Cheng <bayi.cheng@...iatek.com>
To: David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>
CC: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Daniel Kurtz <djkurtz@...omium.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
Bayi Cheng <bayi.cheng@...iatek.com>
Subject: [PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.cheng@...iatek.com>
---
Documentation/devicetree/bindings/mtd/mtk_nor.txt | 25 +++++++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtk_nor.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtk_nor.txt b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
new file mode 100644
index 0000000..0eca0cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk_nor.txt
@@ -0,0 +1,25 @@
+* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
+
+MTK MT81xx serial flash controller is designed for serial Flash device.
+It supports one Flash device with signal mode, dual mode and quad mode.
+
+Required properties:
+- compatible: should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's register
+- clocks: spi nor source clock
+- clock-names: "spi_clk", "axi_clk", "mux_clk", "sf_clk"
+
+See Documentation/devicetree/bindings/clock/clock-bindings.txt
+and Documentation/mtd/spi-nor.txt for details.
+
+Example:
+nor_flash: nor@...0d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = <&pericfg CLK_PERI_SPI>,
+ <&topckgen CLK_TOP_AXI_SEL>,
+ <&topckgen CLK_TOP_UNIVPLL2_D8>,
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi_clk", "axi_clk", "mux_clk", "sf_clk";
+};
+
--
1.8.1.1.dirty
--
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