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Message-ID: <55F10B9F.6000703@oracle.com>
Date:	Thu, 10 Sep 2015 00:48:31 -0400
From:	Sasha Levin <sasha.levin@...cle.com>
To:	Peter Zijlstra <peterz@...radead.org>, mingo@...nel.org
CC:	vincent.weaver@...ne.edu, eranian@...gle.com, jolsa@...hat.com,
	kan.liang@...el.com, linux-kernel@...r.kernel.org,
	Andrew Hunter <ahh@...gle.com>,
	Maria Dimakopoulou <maria.n.dimakopoulou@...il.com>
Subject: Re: [PATCH 01/10] perf,x86: Fix event/group validation

Ping?

On 08/21/2015 04:31 PM, Sasha Levin wrote:
> On 05/21/2015 07:17 AM, Peter Zijlstra wrote:
>> --- a/arch/x86/kernel/cpu/perf_event_intel.c
>> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
>> @@ -2106,7 +2106,7 @@ static struct event_constraint *
>>  intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
>>  			    struct perf_event *event)
>>  {
>> -	struct event_constraint *c1 = event->hw.constraint;
>> +	struct event_constraint *c1 = cpuc->event_constraint[idx];
>>  	struct event_constraint *c2;
> 
> Hey Peter,
> 
> I was chasing a memory corruption in this area and I think I found
> a possible culprit:
> 
> After this patch, In the code above, we'd access "cpuc->event_constraint[idx]"
> and read/change memory.
> 
> The problem is that a valid value for idx is also -1, which isn't checked
> here, so we end up accessing and possibly corrupting memory that isn't ours.
> 
> 
> Thanks,
> Sasha
> 

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