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Message-Id: <1441858434-2846-4-git-send-email-shraddha.6596@gmail.com>
Date: Thu, 10 Sep 2015 09:43:52 +0530
From: Shraddha Barke <shraddha.6596@...il.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Jonathan Cameron <jic23@...nel.org>,
Peter Meerwald <pmeerw@...erw.net>,
Hartmut Knaack <knaack.h@....de>, linux-kernel@...r.kernel.org,
Julia Lawall <julia.lawall@...6.fr>
Cc: Shraddha Barke <shraddha.6596@...il.com>
Subject: [PATCH 4/6] Staging: iio: cdc: ad7746.c: Prefer using the BIT macro
This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.
This was done with coccinelle:
@@ int g; @@
-(1 << g)
+BIT(g)
Signed-off-by: Shraddha Barke <shraddha.6596@...il.com>
---
drivers/staging/iio/cdc/ad7746.c | 42 ++++++++++++++++++++--------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c
index e6e9eaa..e17d4e1 100644
--- a/drivers/staging/iio/cdc/ad7746.c
+++ b/drivers/staging/iio/cdc/ad7746.c
@@ -46,48 +46,48 @@
#define AD7746_REG_VOLT_GAINL 18
/* Status Register Bit Designations (AD7746_REG_STATUS) */
-#define AD7746_STATUS_EXCERR (1 << 3)
-#define AD7746_STATUS_RDY (1 << 2)
-#define AD7746_STATUS_RDYVT (1 << 1)
-#define AD7746_STATUS_RDYCAP (1 << 0)
+#define AD7746_STATUS_EXCERR BIT(3)
+#define AD7746_STATUS_RDY BIT(2)
+#define AD7746_STATUS_RDYVT BIT(1)
+#define AD7746_STATUS_RDYCAP BIT(0)
/* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
-#define AD7746_CAPSETUP_CAPEN (1 << 7)
-#define AD7746_CAPSETUP_CIN2 (1 << 6) /* AD7746 only */
-#define AD7746_CAPSETUP_CAPDIFF (1 << 5)
-#define AD7746_CAPSETUP_CACHOP (1 << 0)
+#define AD7746_CAPSETUP_CAPEN BIT(7)
+#define AD7746_CAPSETUP_CIN2 BIT(6) /* AD7746 only */
+#define AD7746_CAPSETUP_CAPDIFF BIT(5)
+#define AD7746_CAPSETUP_CACHOP BIT(0)
/* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
-#define AD7746_VTSETUP_VTEN (1 << 7)
+#define AD7746_VTSETUP_VTEN BIT(7)
#define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5)
-#define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5)
+#define AD7746_VTSETUP_VTMD_EXT_TEMP BIT(5)
#define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5)
#define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5)
-#define AD7746_VTSETUP_EXTREF (1 << 4)
-#define AD7746_VTSETUP_VTSHORT (1 << 1)
-#define AD7746_VTSETUP_VTCHOP (1 << 0)
+#define AD7746_VTSETUP_EXTREF BIT(4)
+#define AD7746_VTSETUP_VTSHORT BIT(1)
+#define AD7746_VTSETUP_VTCHOP BIT(0)
/* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
-#define AD7746_EXCSETUP_CLKCTRL (1 << 7)
-#define AD7746_EXCSETUP_EXCON (1 << 6)
-#define AD7746_EXCSETUP_EXCB (1 << 5)
-#define AD7746_EXCSETUP_NEXCB (1 << 4)
-#define AD7746_EXCSETUP_EXCA (1 << 3)
-#define AD7746_EXCSETUP_NEXCA (1 << 2)
+#define AD7746_EXCSETUP_CLKCTRL BIT(7)
+#define AD7746_EXCSETUP_EXCON BIT(6)
+#define AD7746_EXCSETUP_EXCB BIT(5)
+#define AD7746_EXCSETUP_NEXCB BIT(4)
+#define AD7746_EXCSETUP_EXCA BIT(3)
+#define AD7746_EXCSETUP_NEXCA BIT(2)
#define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
/* Config Register Bit Designations (AD7746_REG_CFG) */
#define AD7746_CONF_VTFS(x) ((x) << 6)
#define AD7746_CONF_CAPFS(x) ((x) << 3)
#define AD7746_CONF_MODE_IDLE (0 << 0)
-#define AD7746_CONF_MODE_CONT_CONV (1 << 0)
+#define AD7746_CONF_MODE_CONT_CONV BIT(0)
#define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
#define AD7746_CONF_MODE_PWRDN (3 << 0)
#define AD7746_CONF_MODE_OFFS_CAL (5 << 0)
#define AD7746_CONF_MODE_GAIN_CAL (6 << 0)
/* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
-#define AD7746_CAPDAC_DACEN (1 << 7)
+#define AD7746_CAPDAC_DACEN BIT(7)
#define AD7746_CAPDAC_DACP(x) ((x) & 0x7F)
/*
--
2.1.4
--
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