linux-kernel - Re: [PATCH 5/6] MIPS: CONFIG_MIPS_MT_SMP should depend upon CPU

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Message-ID: <20150912151131.GA3831@NP-P-BURTON>
Date:	Sat, 12 Sep 2015 08:11:31 -0700
From:	Paul Burton <paul.burton@...tec.com>
To:	Ralf Baechle <ralf@...ux-mips.org>
CC:	<linux-mips@...ux-mips.org>,
	Markos Chandras <markos.chandras@...tec.com>,
	<stable@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/6] MIPS: CONFIG_MIPS_MT_SMP should depend upon
 CPU_MIPSR2

On Sat, Sep 12, 2015 at 12:16:39PM +0200, Ralf Baechle wrote:
> >  config MIPS_MT_SMP
> >  	bool "MIPS MT SMP support (1 TC on each available VPE)"
> > -	depends on SYS_SUPPORTS_MULTITHREADING
> > +	depends on SYS_SUPPORTS_MULTITHREADING && CPU_MIPSR2
> 
> Right now this line is
> 
> depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
> 
> which I believe is correct.  The MT SMP support aka VSMP had been
> carefully crafted to work on older ASEs that is all use of MIPS MT
> instructions or features was carefully protected by cpu_has_mipsmt
> or similar.

I disagree. The "background" section in the introduction to the MT ASE
spec (MD00376, revision 1.12) reads:

> Multi-threading, or the concurrent presence of multiple active threads
> or contexts of execution on the same CPU, is an increasingly
> widely-used technique for tolerating memory and execution latency and
> for getting higher utilization out of processor functional units. The
> MIPS® Multi-threading (MT) Module is an extension to Release 2 (and
> newer) of the MIPS32® Architecture which provides a framework for
> multi-threading the MIPS processor architecture.

MT is quite clearly an extension to r2. The MT bit in Config3 has this
note in the MIPS32 PRA (MD00088, revision 6.01):

> For Release 6 and MIPS after, this bit must be 0.

Thus MT is an option from r2 <= ISA < r6. The current !CPU_MIPSR6
constraint in Kconfig only enforces half of that. Depending upon
CPU_MIPSR2 would enforce the whole.

Thanks,
    Paul
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