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Message-Id: <1442228798-15191-4-git-send-email-wxt@rock-chips.com>
Date:	Mon, 14 Sep 2015 19:06:38 +0800
From:	Caesar Wang <wxt@...k-chips.com>
To:	heiko@...ech.de, jassisinghbrar@...il.com
Cc:	devicetree@...r.kernel.org, wxt@...k-chips.com, robh+dt@...nel.org,
	galak@...eaurora.org, linux-kernel@...r.kernel.org,
	ijc+devicetree@...lion.org.uk, linux-rockchip@...ts.infradead.org,
	pawel.moll@....com, will.deacon@....com, mark.rutland@....com,
	olof@...om.net, catalin.marinas@....com,
	linux-arm-kernel@...ts.infradead.org, frank.wang@...k-chips.com
Subject: [PATCH 3/3] ARM64: dts: rk3368: Add mailbox device nodes

This adds mailbox device nodes in dts.

mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processormZ

Signed-off-by: Caesar Wang <wxt@...k-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea..9ac5cca 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -484,6 +484,19 @@
 		status = "disabled";
 	};
 
+	mbox: mbox@...b0000 {
+		compatible = "rockchip,rk3368-mailbox";
+		reg = <0x0 0xff6b0000 0x0 0x1000>,
+		      <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+	};
+
 	pmugrf: syscon@...38000 {
 		compatible = "rockchip,rk3368-pmugrf", "syscon";
 		reg = <0x0 0xff738000 0x0 0x1000>;
-- 
1.9.1

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