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Message-ID: <55F6E4D1.3030005@hpe.com>
Date: Mon, 14 Sep 2015 11:16:33 -0400
From: Waiman Long <waiman.long@....com>
To: Davidlohr Bueso <dave@...olabs.net>
CC: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
linux-kernel@...r.kernel.org, Scott J Norton <scott.norton@...com>,
Douglas Hatch <doug.hatch@...com>
Subject: Re: [PATCH v6 1/6] locking/qspinlock: relaxes cmpxchg & xchg ops
in native code
On 09/11/2015 06:27 PM, Davidlohr Bueso wrote:
> On Fri, 11 Sep 2015, Waiman Long wrote:
>
>> @@ -46,7 +46,7 @@ static inline bool virt_queued_spin_lock(struct
>> qspinlock *lock)
>> if (!static_cpu_has(X86_FEATURE_HYPERVISOR))
>> return false;
>>
>> - while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0)
>> + while (atomic_cmpxchg_acquire(&lock->val, 0, _Q_LOCKED_VAL) != 0)
>> cpu_relax();
>
> This code has changed with Peter's recent ccas fix. And the whole
> virt_queued_spin_lock()
> thing will now be under pv configs. So this doesn't apply to native
> code anymore, so it
> looks like it should be dropped altogether.
>
> Thanks,
> Davidlohr
You are right. Patch 1 needs to be updated on top of PeterZ latest patch.
Cheers,
Longman
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