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Message-Id: <1442582334-29387-3-git-send-email-ivan.ivanov@linaro.org>
Date: Fri, 18 Sep 2015 16:18:54 +0300
From: "Ivan T. Ivanov" <ivan.ivanov@...aro.org>
To: Andy Gross <agross@...eaurora.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Stanimir Varbanov <stanimir.varbanov@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Subject: [PATCH v2 2/2] arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
Add DMA channels definitions for UART1 and UART2 controllers.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@...aro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 85f7bee33c18..4d313a9eba7b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -108,6 +108,8 @@
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
+ dmas = <&blsp_dma 1>, <&blsp_dma 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -117,6 +119,8 @@
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
+ dmas = <&blsp_dma 3>, <&blsp_dma 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
--
1.9.1
--
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