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Message-ID: <20150922185230.GR7356@arm.com>
Date: Tue, 22 Sep 2015 19:52:30 +0100
From: Will Deacon <will.deacon@....com>
To: David Daney <ddaney.cavm@...il.com>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <Pawel.Moll@....com>,
Mark Rutland <Mark.Rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Marc Zyngier <Marc.Zyngier@....com>,
David Daney <david.daney@...ium.com>
Subject: Re: [PATCH 3/3] PCI: generic: Add support for Cavium ThunderX PCIe
root complexes.
On Thu, Sep 17, 2015 at 11:41:34PM +0100, David Daney wrote:
> From: David Daney <david.daney@...ium.com>
>
> The config space for external PCIe root complexes on some Cavium
> ThunderX SoCs is very similar to CAM and ECAM, but differs in the
> shift values that have to be applied to the bus and devfn numbers to
> compose that address window offset. These root complexes also have
> the interesting property that there is no root bridge, so the standard
> manner of limiting scanning to only the first device doesn't work. We
> can use the standard pci-host-generic driver if we make a minor
> addition to handle these differences, so we...
>
> Add a mapping function for ThunderX PCIe root complexes with a bus
> shift of 24 and devfn shift of 16. Ignore accesses for devices other
> than the first device on the primary bus.
>
> Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt
>
> Signed-off-by: David Daney <david.daney@...ium.com>
> ---
> .../devicetree/bindings/pci/host-generic-pci.txt | 8 +++---
> drivers/pci/host/pci-host-generic.c | 29 ++++++++++++++++++++++
> 2 files changed, 34 insertions(+), 3 deletions(-)
Thanks, this looks better now:
Acked-by: Will Deacon <will.deacon@....com>
Will
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