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Message-ID: <20150923003114.GB3529@tiger>
Date:	Tue, 22 Sep 2015 17:31:14 -0700
From:	Shawn Guo <shawnguo@...nel.org>
To:	Sanchayan Maity <maitysanchayan@...il.com>
Cc:	srinivas.kandagatla@...aro.org, gregkh@...uxfoundation.org,
	maxime.ripard@...e-electrons.com, devicetree@...r.kernel.org,
	linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, stefan@...er.ch,
	kernel@...gutronix.de
Subject: Re: [PATCH v10 1/4] clk: clk-vf610: Add clock for Vybrid OCOTP
 controller

On Mon, Sep 07, 2015 at 01:51:35PM +0530, Sanchayan Maity wrote:
> Add clock support for Vybrid On-Chip One Time Programmable
> (OCOTP) controller.
> 
> While the OCOTP block does not require explicit clock gating,
> for programming the OCOTP timing register the clock rate of
> ipg clock is required for timing calculations related to fuse
> and shadow register read sequence. We explicitly specify the
> ipg clock for OCOTP as a result.
> 
> Signed-off-by: Sanchayan Maity <maitysanchayan@...il.com>

Applied this one, thanks.
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