linux-kernel - Re: [PATCH 2/4] pinctrl: sunxi: add allwinner A83T PIO controller support

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Message-ID: <20150924101503.GQ4684@lukather>
Date:	Thu, 24 Sep 2015 12:15:03 +0200
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	Chen-Yu Tsai <wens@...e.org>
Cc:	Vishnu Patekar <vishnupatekar0510@...il.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Emilio Lopez <emilio@...pez.com.ar>,
	Linus Walleij <linus.walleij@...aro.org>,
	Jens Kuske <jenskuske@...il.com>,
	Hans De Goede <hdegoede@...hat.com>,
	devicetree <devicetree@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	linux-sunxi <linux-sunxi@...glegroups.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 2/4] pinctrl: sunxi: add allwinner A83T PIO controller
 support

On Wed, Sep 23, 2015 at 12:06:56AM +0800, Chen-Yu Tsai wrote:
> > +static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
> > +       .pins = sun8i_a83t_pins,
> > +       .npins = ARRAY_SIZE(sun8i_a83t_pins),
> > +       .irq_banks = 3,
> 
> Do you know if there's a hole at where PA_EINT interrupt registers
> should be? AFAIK we aren't handling that properly, but that is outside
> the scope of this patch.

Judging from the A83t datasheet, PB seems to be the first IRQ bank, so
it should be fine.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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