linux-kernel - Re: [PATCH v2 5/9] dt-bindings: add documentation of rk3036 clock controller

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Date:	Thu, 24 Sep 2015 11:42:23 +0800
From:	Xing Zheng <zhengxing@...k-chips.com>
To:	Heiko Stübner <heiko@...ech.de>
CC:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 5/9] dt-bindings: add documentation of rk3036 clock
 controller

On 2015年09月17日 23:09, Heiko Stübner wrote:
> Am Donnerstag, 17. September 2015, 18:32:49 schrieb Xing Zheng:
>> Add the devicetree binding for the cru on the rk3036 which quite similar
>> structured as previous clock controllers.
>>
>> Signed-off-by: Xing Zheng<zhengxing@...k-chips.com>
>> ---
>>
>> Changes in v2: None
>>
>>   .../bindings/clock/rockchip,rk3036-cru.txt         |   60
>> ++++++++++++++++++++ 1 file changed, 60 insertions(+)
>>   create mode 100644
>> Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
>>
>> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
>> b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt new file
>> mode 100644
>> index 0000000..ac3037a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
>> @@ -0,0 +1,60 @@
>> +* Rockchip RK3036 Clock and Reset Unit
>> +
>> +The RK3036 clock controller generates and supplies clock to various
>> +controllers within the SoC and also implements a reset controller for SoC
>> +peripherals.
>> +
>> +Required Properties:
>> +
>> +- compatible: should be "rockchip,rk3036-cru"
>> +- reg: physical base address of the controller and length of memory mapped
>> +  region.
>> +- #clock-cells: should be 1.
>> +- #reset-cells: should be 1.
>> +
>> +Optional Properties:
>> +
>> +- rockchip,grf: phandle to the syscon managing the "general register files"
>> +  If missing pll rates are not changable, due to the missing pll lock
>> status. +
>> +Each clock is assigned an identifier and client nodes can use this
>> identifier +to specify the clock which they consume. All available clocks
>> are defined as +preprocessor macros in the dt-bindings/clock/rk3036-cru.h
>> headers and can be +used in device tree sources. Similar macros exist for
>> the reset sources in +these files.
>> +
>> +External clocks:
>> +
>> +There are several clocks that are generated outside the SoC. It is expected
>> +that they are defined using standard clock bindings with following
>> +clock-output-names:
>> + - "xin24m" - crystal input - required,
>> + - "xin32k" - rtc clock - optional,
> The rk3036 does not seem to use a rtc clock, so this should probably go away
Done.
>> + - "ext_i2s" - external I2S clock - optional,
>> + - "ext_hsadc" - external HSADC clock - optional,
>> + - "ext_vip" - external VIP clock - optional,
>> + - "ext_isp" - external ISP clock - optional,
>> + - "ext_jtag" - external JTAG clock - optional
> There do not seem to exist external clock sources for hsadc, vip, isp and jtag
> in your clock tree?
>
> missing here:
> - ext_gmac
Yes, done.
>> +
>> +Example: Clock controller node:
>> +
>> +	cru: cru@...00000 {
>> +		compatible = "rockchip,rk3036-cru";
>> +		reg =<0x20000000 0x1000>;
>> +		rockchip,grf =<&grf>;
>> +
>> +		#clock-cells =<1>;
>> +		#reset-cells =<1>;
>> +	};
>> +
>> +Example: UART controller node that consumes the clock generated by the
>> clock +  controller:
>> +
>> +	uart0: serial@...60000 {
>> +		compatible = "snps,dw-apb-uart";
>> +		reg =<0x20060000 0x100>;
>> +		interrupts =<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
>> +		reg-shift =<2>;
>> +		reg-io-width =<4>;
>> +		clocks =<&cru SCLK_UART0>;
>> +	};
Thanks.

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