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Message-Id: <1443122339-13917-8-git-send-email-agross@codeaurora.org>
Date: Thu, 24 Sep 2015 14:18:56 -0500
From: Andy Gross <agross@...eaurora.org>
To: linux-arm-msm@...r.kernel.org
Cc: Bjorn Andersson <bjorn.andersson@...ymobile.com>,
Mark Brown <broonie@...nel.org>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Andy Gross <agross@...eaurora.org>
Subject: [Patch v3 07/10] arm: dts: Add APQ8084 SMEM nodes
This patch adds all the required nodes to support SMEM on APQ8084
Signed-off-by: Andy Gross <agross@...eaurora.org>
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0554fbd..76be0ba 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -10,6 +10,17 @@
compatible = "qcom,apq8084";
interrupt-parent = <&intc>;
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ smem_mem: smem_region@...0000 {
+ reg = <0xfa00000 0x200000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -224,6 +235,26 @@
reg = <0xfc400000 0x4000>;
};
+ tcsr_mutex_regs: syscon@...84000 {
+ compatible = "syscon";
+ reg = <0xfd484000 0x2000>;
+ };
+
+ tcsr_mutex: hwlock {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x80>;
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ reg = <0xfc428000 0x4000>;
+ reg-names = "aux-mem1";
+
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
tlmm: pinctrl@...10000 {
compatible = "qcom,apq8084-pinctrl";
reg = <0xfd510000 0x4000>;
--
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