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Message-Id: <20150928191820.BF4CBF05@viggo.jf.intel.com>
Date: Mon, 28 Sep 2015 12:18:20 -0700
From: Dave Hansen <dave@...1.net>
To: dave@...1.net
Cc: borntraeger@...ibm.com, x86@...nel.org,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
dave.hansen@...ux.intel.com
Subject: [PATCH 07/25] x86, pkeys: new page fault error code bit: PF_PK
From: Dave Hansen <dave.hansen@...ux.intel.com>
Note: "PK" is how the Intel SDM refers to this bit, so we also
use that nomenclature.
This only defines the bit, it does not plumb it anywhere to be
handled.
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
---
b/arch/x86/mm/fault.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff -puN arch/x86/mm/fault.c~pkeys-05-pfec arch/x86/mm/fault.c
--- a/arch/x86/mm/fault.c~pkeys-05-pfec 2015-09-28 11:39:44.073097565 -0700
+++ b/arch/x86/mm/fault.c 2015-09-28 11:39:44.076097701 -0700
@@ -33,6 +33,7 @@
* bit 2 == 0: kernel-mode access 1: user-mode access
* bit 3 == 1: use of reserved bit detected
* bit 4 == 1: fault was an instruction fetch
+ * bit 5 == 1: protection keys block access
*/
enum x86_pf_error_code {
@@ -41,6 +42,7 @@ enum x86_pf_error_code {
PF_USER = 1 << 2,
PF_RSVD = 1 << 3,
PF_INSTR = 1 << 4,
+ PF_PK = 1 << 5,
};
/*
@@ -916,7 +918,10 @@ static int spurious_fault_check(unsigned
if ((error_code & PF_INSTR) && !pte_exec(*pte))
return 0;
-
+ /*
+ * Note: We do not do lazy flushing on protection key
+ * changes, so no spurious fault will ever set PF_PK.
+ */
return 1;
}
_
--
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