lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87si5ymjki.fsf@eliezer.anholt.net>
Date:	Mon, 28 Sep 2015 12:26:37 -0700
From:	Eric Anholt <eric@...olt.net>
To:	Stephen Warren <swarren@...dotorg.org>
Cc:	linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-rpi-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Lee Jones <lee@...nel.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Mike Turquette <mturquette@...libre.com>,
	devicetree@...r.kernel.org
Subject: Re: [PATCH 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

Stephen Warren <swarren@...dotorg.org> writes:

> On 09/10/2015 03:22 PM, Eric Anholt wrote:
>> These will be used for enabling UART1, SPI1, and SPI2.
>
>> diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
>
>> +		aux_clocks: aux-clocks@...e215004 {
>> +			compatible = "brcm,bcm2835-aux-clock";
>> +			#clock-cells = <1>;
>> +			reg = <0x7e215004 0x4>;
>
> Actually, I take back the ack on this patch. This HW module has two
> registers. The reg property should include both of those registers so
> that if SW needs to start using the other register at some time in the
> future, the entire set of registers is already represented in DT.

If I changed it to "reg = <0x7e215000 0x8>" and use a #define for the
clock register offset in patch 2/3, would I then have your ack?

Download attachment "signature.asc" of type "application/pgp-signature" (819 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ