linux-kernel - [tip:irq/core] irqchip/gicv3-its: Read typer register outside the loop

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Message-ID: <tip-c14e36733b8a63894db9ca0b486ce14299ef2fda@git.kernel.org>
Date:	Tue, 29 Sep 2015 01:16:22 -0700
From:	tip-bot for Robert Richter <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, tglx@...utronix.de, hpa@...or.com,
	marc.zyngier@....com, mingo@...nel.org, catalin.marinas@....com,
	rrichter@...ium.com, tchalamarla@...ium.com, jason@...edaemon.net
Subject: [tip:irq/core] irqchip/gicv3-its:
  Read typer register outside the loop

Commit-ID:  c14e36733b8a63894db9ca0b486ce14299ef2fda
Gitweb:     http://git.kernel.org/tip/c14e36733b8a63894db9ca0b486ce14299ef2fda
Author:     Robert Richter <rrichter@...ium.com>
AuthorDate: Mon, 21 Sep 2015 22:58:36 +0200
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Tue, 29 Sep 2015 10:10:53 +0200

irqchip/gicv3-its: Read typer register outside the loop

No need to read the typer register in the loop. Values do not change.

This patch is basically a prerequisite for a follow-on patch that adds
errata code for Cavium ThunderX. It moves the calculation of the
number of id entries to the beginning of the function close to other
setup values that are needed to allocate the its table. Now we have a
central location to modify the setup parameters and the errata code
can be implemented in a single block.

Signed-off-by: Robert Richter <rrichter@...ium.com>
Acked-by: Marc Zyngier <marc.zyngier@....com>
Acked-by: Catalin Marinas <catalin.marinas@....com>
Cc: Tirumalesh Chalamarla <tchalamarla@...ium.com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: Jason Cooper <jason@...edaemon.net>
Link: http://lkml.kernel.org/r/1442869119-1814-4-git-send-email-rric@kernel.org
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 drivers/irqchip/irq-gic-v3-its.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index d9052fd..549e716 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -815,6 +815,8 @@ static int its_alloc_tables(const char *node_name, struct its_node *its)
 	int psz = SZ_64K;
 	u64 shr = GITS_BASER_InnerShareable;
 	u64 cache = GITS_BASER_WaWb;
+	u64 typer = readq_relaxed(its->base + GITS_TYPER);
+	u32 ids = GITS_TYPER_DEVBITS(typer);
 
 	for (i = 0; i < GITS_BASER_NR_REGS; i++) {
 		u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
@@ -838,9 +840,6 @@ static int its_alloc_tables(const char *node_name, struct its_node *its)
 		 * For other tables, only allocate a single page.
 		 */
 		if (type == GITS_BASER_TYPE_DEVICE) {
-			u64 typer = readq_relaxed(its->base + GITS_TYPER);
-			u32 ids = GITS_TYPER_DEVBITS(typer);
-
 			/*
 			 * 'order' was initialized earlier to the default page
 			 * granule of the the ITS.  We can't have an allocation
--
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