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Message-ID: <20151001150909.GC4043@linux.vnet.ibm.com>
Date: Thu, 1 Oct 2015 08:09:09 -0700
From: "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Boqun Feng <boqun.feng@...il.com>, linux-kernel@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, Ingo Molnar <mingo@...nel.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Thomas Gleixner <tglx@...utronix.de>,
Will Deacon <will.deacon@....com>,
Waiman Long <waiman.long@...com>
Subject: Re: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and
atomic{,64}_xchg_* variants
On Thu, Oct 01, 2015 at 02:24:40PM +0200, Peter Zijlstra wrote:
> On Wed, Sep 16, 2015 at 11:49:32PM +0800, Boqun Feng wrote:
> > Implement xchg_relaxed and define atomic{,64}_xchg_* as xchg_relaxed,
> > based on these _relaxed variants, release/acquire variants can be built.
> >
> > Note that xchg_relaxed and atomic_{,64}_xchg_relaxed are not compiler
> > barriers.
>
> Hmm, and I note your previous patch creating the regular _relaxed
> thingies also removes the memory clobber.
>
> And looking at the ARM _relaxed patch from Will, I see their _relaxed
> ops are also not a compiler barrier.
>
> I must say I'm somewhat surprised by this level of relaxation, I had
> expected to only loose SMP barriers, not the program order ones.
>
> Is there a good argument for this?
Yes, when we say "relaxed", we really mean relaxed. ;-)
Both the CPU and the compiler are allowed to reorder around relaxed
operations.
Thanx, Paul
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