linux-kernel - Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

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Message-ID: <20151002173131.GF107187@google.com>
Date:	Fri, 2 Oct 2015 10:31:31 -0700
From:	Brian Norris <computersforpeace@...il.com>
To:	Archit Taneja <architt@...eaurora.org>
Cc:	linux-mtd@...ts.infradead.org, dehrenberg@...gle.com,
	cernekee@...il.com, sboyd@...eaurora.org,
	linux-arm-msm@...r.kernel.org, agross@...eaurora.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

One more nit noticed by my build tests:

On Wed, Aug 19, 2015 at 10:19:03AM +0530, Archit Taneja wrote:

[...]

> +static int qcom_nandc_ecc_init(struct qcom_nandc_data *this)
> +{
> +	struct mtd_info *mtd = &this->mtd;
> +	struct nand_chip *chip = &this->chip;
> +	struct nand_ecc_ctrl *ecc = &chip->ecc;
> +	int cwperpage;

drivers/mtd/nand/qcom_nandc.c: In function ‘qcom_nandc_ecc_init’:
drivers/mtd/nand/qcom_nandc.c:1517:6: warning: variable ‘cwperpage’ set but not used [-Wunused-but-set-variable]

> +	bool wide_bus;
> +
> +	/* the nand controller fetches codewords/chunks of 512 bytes */
> +	cwperpage = mtd->writesize >> 9;
> +
> +	ecc->strength = this->ecc_strength;
> +
> +	wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false;
> +
> +	if (ecc->strength >= 8) {
> +		/* 8 bit ECC defaults to BCH ECC on all platforms */
> +		ecc->bytes = wide_bus ? 14 : 13;
> +	} else {
> +		/*
> +		 * if the controller supports BCH for 4 bit ECC, the controller
> +		 * uses lesser bytes for ECC. If RS is used, the ECC bytes is
> +		 * always 10 bytes
> +		 */
> +		if (this->ecc_modes & ECC_BCH_4BIT)
> +			ecc->bytes = wide_bus ? 8 : 7;
> +		else
> +			ecc->bytes = 10;
> +	}
> +
> +	/* each step consists of 512 bytes of data */
> +	ecc->size = NANDC_STEP_SIZE;
> +
> +	ecc->read_page		= qcom_nandc_read_page;
> +	ecc->read_oob		= qcom_nandc_read_oob;
> +	ecc->write_page		= qcom_nandc_write_page;
> +	ecc->write_oob		= qcom_nandc_write_oob;
> +
> +	/*
> +	 * the bad block marker is readable only when we read the page with ECC
> +	 * disabled. all the ops above run with ECC enabled. We need raw read
> +	 * and write function for oob in order to access bad block marker.
> +	 */
> +	ecc->read_oob_raw	= qcom_nandc_read_oob_raw;
> +	ecc->write_oob_raw	= qcom_nandc_write_oob_raw;
> +
> +	switch (mtd->oobsize) {
> +	case 64:
> +		ecc->layout = &layout_oob_64;
> +		break;
> +	case 128:
> +		ecc->layout = &layout_oob_128;
> +		break;
> +	case 224:
> +		if (wide_bus)
> +			ecc->layout = &layout_oob_224_x16;
> +		else
> +			ecc->layout = &layout_oob_224_x8;
> +		break;
> +	case 256:
> +		ecc->layout = &layout_oob_256;
> +		break;
> +	default:
> +		dev_err(this->dev, "unsupported NAND device, oobsize %d\n",
> +			mtd->oobsize);
> +		return -ENODEV;
> +	}
> +
> +	ecc->mode = NAND_ECC_HW;
> +
> +	/* enable ecc by default */
> +	this->use_ecc = true;
> +
> +	return 0;
> +}

[...]

Brian
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