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Message-ID: <CAK7LNASLjEFSogG9Ab-Zsrgbr09sxSDaN6Gr0dzQ82VpPUNcmQ@mail.gmail.com>
Date:	Fri, 2 Oct 2015 13:30:57 +0900
From:	Masahiro Yamada <yamada.masahiro@...ionext.com>
To:	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	arm@...nel.org
Cc:	Masahiro Yamada <yamada.masahiro@...ionext.com>,
	Arnd Bergmann <arnd@...db.de>, Jiri Slaby <jslaby@...e.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Kumar Gala <galak@...eaurora.org>,
	Jungseung Lee <js07.lee@...il.com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Herring <robh+dt@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Nishanth Menon <nm@...com>, Pawel Moll <pawel.moll@....com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Tomasz Figa <t.figa@...sung.com>, devicetree@...r.kernel.org,
	Jiang Liu <jiang.liu@...ux.intel.com>,
	Mauro Carvalho Chehab <mchehab@....samsung.com>,
	Russell King <linux@....linux.org.uk>,
	Nathan Lynch <nathan_lynch@...tor.com>,
	Kees Cook <keescook@...omium.org>,
	Paul Bolle <pebolle@...cali.nl>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	"David S. Miller" <davem@...emloft.net>,
	Joe Perches <joe@...ches.com>,
	Uwe Kleine-König 
	<u.kleine-koenig@...gutronix.de>, Tony Lindgren <tony@...mide.com>,
	Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v4 0/3] ARM: uniphier: add outer cache support and rework
 SMP operations

2015-09-30 20:01 GMT+09:00 Masahiro Yamada <yamada.masahiro@...ionext.com>:
> Hi Olof,
>
> Now Linux 4.3-rc1 is out, so I am back to this.
>
> 1/3: add outer cache support
> 2/3: rework SMP operations
> 3/3: add device tree nodes
>
> Because 2/3 highly depends on 1/3, I hope whole of this series
> is applied through ARM-SOC tree.
>
>
> Changes in v4:
>   - Add more detailed comments to explain why no spin lock is needed
>   - Add two examples to the binding document
>
> Changes in v3:
>   - Drop bogus includes
>
> Changes in v2:
>   - Use pr_fmt() to have pr_<level> are automatically prefixed
>   - Re-design to initialize the outer cache earlier in init_IRQ()
>   - Require DT properties such as "cacne-unified", "cache-size",
>     "cache-sets", "cache-size", "cache-line-size".
>   - Follow "next-level-cache" property to search further outer caches
>


I found something to be fixed.

I will send v5.



-- 
Best Regards
Masahiro Yamada
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