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Message-ID: <CAL_JsqLt2=Cb8SDAQG7XiMNC7NV59MimYETyt87-QYHt31cnsQ@mail.gmail.com>
Date: Mon, 5 Oct 2015 10:34:38 -0500
From: Rob Herring <robherring2@...il.com>
To: Daniel Thompson <daniel.thompson@...aro.org>
Cc: Matt Mackall <mpm@...enic.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
linux-crypto@...r.kernel.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linaro Patches <patches@...aro.org>,
"linaro-kernel@...ts.linaro.org" <linaro-kernel@...ts.linaro.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>
Subject: Re: [PATCH 1/3] dt-bindings: Document the STM32 HW RNG bindings
On Sat, Oct 3, 2015 at 3:35 PM, Daniel Thompson
<daniel.thompson@...aro.org> wrote:
> This adds documenttaion of device tree binds for the STM32 hardware
> random number generator.
>
> Signed-off-by: Daniel Thompson <daniel.thompson@...aro.org>
> ---
> .../devicetree/bindings/hwrng/stm32-rng.txt | 21 +++++++++++++++++++++
Please use bindings/rng/... as I'm consolidating bindings there.
Otherwise,
Acked-by: Rob Herring <robh@...nel.org>
> 1 file changed, 21 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/hwrng/stm32-rng.txt
>
> diff --git a/Documentation/devicetree/bindings/hwrng/stm32-rng.txt b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt
> new file mode 100644
> index 000000000000..47f04176f93b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt
> @@ -0,0 +1,21 @@
> +STMicroelectronics STM32 HW RNG
> +===============================
> +
> +The STM32 hardware random number generator is a simple fixed purpose IP and
> +is fully separated from other crypto functions.
> +
> +Required properties:
> +
> +- compatible : Should be "st,stm32-rng"
> +- reg : Should be register base and length as documented in the datasheet
> +- interrupts : The designated IRQ line for the RNG
> +- clocks : The clock needed to enable the RNG
> +
> +Example:
> +
> + rng: rng@...60800 {
> + compatible = "st,stm32-rng";
> + reg = <0x50060800 0x400>;
> + interrupts = <80>;
> + clocks = <&rcc 0 38>;
> + };
> --
> 2.4.3
>
--
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