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Message-Id: <1444064531-25607-18-git-send-email-suzuki.poulose@arm.com>
Date: Mon, 5 Oct 2015 18:02:06 +0100
From: "Suzuki K. Poulose" <suzuki.poulose@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: marc.zyngier@....com, will.deacon@....com, mark.rutland@....com,
catalin.marinas@....com, steve.capper@...aro.org,
linux-kernel@...r.kernel.org, andre.przywara@....com,
dave.martin@....com, Vladimir.Murzin@....com, james.morse@....com,
ard.biesheuvel@...aro.org, edward.nevill@...aro.org,
aph@...hat.com, "Suzuki K. Poulose" <suzuki.poulose@....com>,
Christoffer Dall <christoffer.dall@...aro.org>,
kvmarm@...ts.cs.columbia.edu
Subject: [PATCH v2 17/22] arm64/kvm: Make use of the system wide safe values
Use the system wide safe value from the new API for safer
decisions
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Christoffer Dall <christoffer.dall@...aro.org>
Cc: kvmarm@...ts.cs.columbia.edu
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@....com>
---
arch/arm64/kvm/reset.c | 2 +-
arch/arm64/kvm/sys_regs.c | 12 ++++++------
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
index 91cf535..f34745c 100644
--- a/arch/arm64/kvm/reset.c
+++ b/arch/arm64/kvm/reset.c
@@ -53,7 +53,7 @@ static bool cpu_has_32bit_el1(void)
{
u64 pfr0;
- pfr0 = read_cpuid(ID_AA64PFR0_EL1);
+ pfr0 = read_system_reg(SYS_ID_AA64PFR0_EL1);
return !!(pfr0 & 0x20);
}
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index d03d3af..87a64e8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -693,13 +693,13 @@ static bool trap_dbgidr(struct kvm_vcpu *vcpu,
if (p->is_write) {
return ignore_write(vcpu, p);
} else {
- u64 dfr = read_cpuid(ID_AA64DFR0_EL1);
- u64 pfr = read_cpuid(ID_AA64PFR0_EL1);
- u32 el3 = !!((pfr >> 12) & 0xf);
+ u64 dfr = read_system_reg(SYS_ID_AA64DFR0_EL1);
+ u64 pfr = read_system_reg(SYS_ID_AA64PFR0_EL1);
+ u32 el3 = !!cpuid_feature_extract_field(pfr, ID_AA64PFR0_EL3_SHIFT);
- *vcpu_reg(vcpu, p->Rt) = ((((dfr >> 20) & 0xf) << 28) |
- (((dfr >> 12) & 0xf) << 24) |
- (((dfr >> 28) & 0xf) << 20) |
+ *vcpu_reg(vcpu, p->Rt) = ((((dfr >> ID_AA64DFR0_WRPS_SHIFT) & 0xf) << 28) |
+ (((dfr >> ID_AA64DFR0_BRPS_SHIFT) & 0xf) << 24) |
+ (((dfr >> ID_AA64DFR0_CTX_CMPS_SHIFT) & 0xf) << 20) |
(6 << 16) | (el3 << 14) | (el3 << 12));
return true;
}
--
1.7.9.5
--
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