lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <CA+5PVA4XggCNPo3eA0fTzsfe7rHEKqoZQwF3Rbj79wjZJFyAMg@mail.gmail.com> Date: Wed, 7 Oct 2015 20:15:45 -0400 From: Josh Boyer <jwboyer@...oraproject.org> To: Michael Ellerman <mpe@...erman.id.au> Cc: Segher Boessenkool <segher@...nel.crashing.org>, Laura Abbott <labbott@...hat.com>, Paul Mackerras <paulus@...ba.org>, "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>, Linux Kernel Mailing List <linux-kernel@...r.kernel.org> Subject: Re: Missing operand for tlbie instruction on Power7 On Wed, Oct 7, 2015 at 8:10 PM, Michael Ellerman <mpe@...erman.id.au> wrote: > On Wed, 2015-10-07 at 10:31 -0400, Josh Boyer wrote: >> On Wed, Oct 7, 2015 at 5:13 AM, Michael Ellerman <mpe@...erman.id.au> wrote: >> > On Wed, 2015-10-07 at 02:19 -0500, Segher Boessenkool wrote: >> >> On Wed, Oct 07, 2015 at 05:00:49PM +1100, Michael Ellerman wrote: >> >> > > It's also worth noting that the __flush_power7 uses tlbiel instead of tlbie. >> >> > >> >> > Yeah that's a good point. It's not clear if the swsusp code wants to a local or >> >> > a global invalidate. >> >> >> >> If I read the code right, this is called on the boot CPU when all the >> >> non-boot CPUs are still (potentially) down, so if you would do a global >> >> invalidate the non-boot CPUs might not even notice, so those need to do >> >> a (local) invalidate after being brought up anyway? Or they probably >> >> need it before being brought down at all? You figure it out, it makes >> >> my brain hurt :-) >> > >> > A good rule would be that every cpu does a local invalidate before turning on >> > the MMU. That would work for this case and also for kexec, kdump, junk left by >> > firmare etc. But I don't think we do that consistently in a way that works for >> > this code at the moment. >> > >> >> > As an alternative, can you try adding a .machine push / .machine "power4" / >> >> > .machine pop, around the tlbie. That should tell the assembler to drop back to >> >> > power4 mode for that instruction, which should then do the right thing. There >> >> > are some examples in that file. >> >> >> >> That will get the assembler to not complain, but it will assemble the wrong >> >> instruction: the power7 instruction has the same opcode (but different >> >> semantics). So if you assemble a "tlbie r4" in power4 mode, a newer CPU >> >> will see it as a "tlbie r4,r0" and do the wrong thing. >> > >> > Yeah, it would basically maintain the existing behaviour which is wrong but a >> > known quantity. I suspect no one has ever run this on Power7 or in fact >> > anything other than G5 or Book3E. >> >> Likely not, but leaving it broken just because it is known behavior >> seems pretty weird to me. > > In a universe where I have infinite time to fix random things we would > obviously do a proper fix :) > >> I think Fedora will look at simply disabling hibernation on ppc64 so the file >> isn't built at all. Seems to be a safer option. > > It's safer for sure. Though you might have some G5 users who are using it and > notice it being disabled. The 5 of them will notice it being disabled and then they'll realize they either get a working kernel minus hibernation, or they get no kernel at all because it doesn't compile. josh -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists