linux-kernel - Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable

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Message-ID: <56169393.5050606@arm.com>
Date:	Thu, 08 Oct 2015 17:02:27 +0100
From:	Marc Zyngier <marc.zyngier@....com>
To:	Catalin Marinas <catalin.marinas@....com>
CC:	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Will Deacon <will.deacon@....com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function

On 08/10/15 16:54, Catalin Marinas wrote:
> On Fri, Oct 02, 2015 at 05:37:51PM +0100, Marc Zyngier wrote:
>> +static inline bool gic_enable_sre(void)
>> +{
>> +	u64 val;
>> +
>> +	asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> +	if (val & ICC_SRE_EL1_SRE)
>> +		return true;
>> +
>> +	val |= ICC_SRE_EL1_SRE;
>> +	asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" (val));
>> +	isb();
>> +	asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> +
>> +	return !!(val & ICC_SRE_EL1_SRE);
>> +}
> 
> I don't think !! is needed ;). Apparently, from ISO C99: "When any
> scalar value is converted to _Bool, the result is 0 if the value
> compares equal to 0; otherwise, the result is 1."

Are you going to break my fingers? ;-)

>From my very own PoV, !! acts as a reminder that I have realised what
the return type is. Yeah, that's how bad my brain is these days :-)

	M.
-- 
Jazz is not dead. It just smells funny...
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