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Message-ID: <15651913.U8kb3JZ9vO@wuerfel>
Date:	Thu, 08 Oct 2015 21:26:07 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	M'boumba Cedric Madianga <cedric.madianga@...il.com>
Cc:	linux-arm-kernel@...ts.infradead.org, mcoquelin.stm32@...il.com,
	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@....linux.org.uk, vinod.koul@...el.com,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	dmaengine@...r.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: Document the STM32 DMA bindings

On Thursday 08 October 2015 18:01:23 M'boumba Cedric Madianga wrote:
> Hi Arnd,
> 
> 2015-10-08 17:43 GMT+02:00 Arnd Bergmann <arnd@...db.de>:
> > On Thursday 08 October 2015 17:20:09 M'boumba Cedric Madianga wrote:
> >> +Each dmas request consists of 5 cells:
> >> +1. A phandle pointing to the STM32 DMA controller
> >> +2. The channel id
> >> +3. The request line number
> >> +4. A 32bit mask specifying the DMA channel configuration
> >>
> >
> > It's fairly unusual to encode the channel id here, rather than
> > letting the driver pick one. Is that actually required here?
>
> Yes it is required as in STM32 platform the channel/request DMA
> mapping is done by hardware lines.
> So, if one client wants to use DMA, he has to choose the correct
> channel/request values according to the DMA mapping of his STM32
> platform.
 
Interesting. So you have seven channels ans seven request lines,
with a random but fixed mapping between them?

How do you know which channels are available for memory-to-memory
transfers?

	Arnd
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