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Message-ID: <1444378629-3057-6-git-send-email-jszhang@marvell.com>
Date:	Fri, 9 Oct 2015 16:17:08 +0800
From:	Jisheng Zhang <jszhang@...vell.com>
To:	<sebastian.hesselbarth@...il.com>, <linus.walleij@...aro.org>,
	<antoine.tenart@...e-electrons.com>
CC:	<catalin.marinas@....com>, <will.deacon@....com>,
	<mark.rutland@....com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Jisheng Zhang <jszhang@...vell.com>
Subject: [PATCH v4 5/6] arm64: dts: berlin4ct: add the pinctrl node

Add the avio, soc, sm pinctrl nodes for Marvell berlin4ct SoC.

Signed-off-by: Jisheng Zhang <jszhang@...vell.com>
---
 arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
index a3b5f1d..8e66355 100644
--- a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
+++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
@@ -225,6 +225,16 @@
 			};
 		};
 
+		soc_pinctrl: pin-controller@...000 {
+			compatible = "marvell,berlin4ct-soc-pinctrl";
+			reg = <0xea8000 0x14>;
+		};
+
+		avio_pinctrl: pin-controller@...400 {
+			compatible = "marvell,berlin4ct-avio-pinctrl";
+			reg = <0xea8400 0x8>;
+		};
+
 		apb@...000 {
 			compatible = "simple-bus";
 			#address-cells = <1>;
@@ -280,5 +290,10 @@
 				status = "disabled";
 			};
 		};
+
+		system_pinctrl: pin-controller@...200 {
+			compatible = "marvell,berlin4ct-system-pinctrl";
+			reg = <0xfe2200 0xc>;
+		};
 	};
 };
-- 
2.6.1

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