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Message-ID: <20151010011155.GH22673@tiger>
Date:	Sat, 10 Oct 2015 09:11:55 +0800
From:	Shawn Guo <shawnguo@...nel.org>
To:	Shengjiu Wang <shengjiu.wang@...escale.com>
Cc:	mark.rutland@....com, devicetree@...r.kernel.org,
	linux@....linux.org.uk, pawel.moll@....com,
	ijc+devicetree@...lion.org.uk, mturquette@...libre.com,
	sboyd@...eaurora.org, linux-kernel@...r.kernel.org,
	robh+dt@...nel.org, kernel@...gutronix.de, galak@...eaurora.org,
	linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V2 1/2] clk: imx6: Add SPDIF_GCLK clock in clock tree

On Fri, Oct 09, 2015 at 05:15:30PM +0800, Shengjiu Wang wrote:
> SPDIF_GCLK is also spdif's clock, it use a same enable bit with SPDIF_ROOT_CLK,
> We didn't separate them in clock tree before.

Is it the clock described as "Global clock" in Reference Manual, SPDIF
chapter?  If that's the case, you are just adding a missing SPDIF clock
rather than fixing a low power mode issue, and I will be fine.  But
still you should reword the commit log to make it clear, that the patch
is to correct a SPDIF clock setting issue, which is just discovered by
low power mode support.

Shawn
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