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Date:	Sat, 10 Oct 2015 03:03:16 +0000
From:	敬锐 <micky_ching@...lsil.com.cn>
To:	Lee Jones <lee.jones@...aro.org>
CC:	"sameo@...ux.intel.com" <sameo@...ux.intel.com>,
	"devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
Subject: Re: [RESEND] mfd: rtsx: add support for rts522A

Hi Lee

Sorry for bother you, but I still can't see this patch applied.
Is there something wrong?

Regards.
micky.
On 07/08/2015 03:38 PM, Lee Jones wrote:
> On Wed, 08 Jul 2015, 敬锐 wrote:
>
>>
>> On 07/07/2015 07:46 PM, Lee Jones wrote:
>>> On Mon, 29 Jun 2015, micky_ching@...lsil.com.cn wrote:
>>>
>>>> From: Micky Ching <micky_ching@...lsil.com.cn>
>>>>
>>>> rts522a(rts5227s) is derived from rts5227, and mainly same with rts5227.
>>>> Add it to file mfd/rts5227.c to support this chip.
>>>>
>>>> Signed-off-by: Micky Ching <micky_ching@...lsil.com.cn>
>>>> ---
>>>>    drivers/mfd/Kconfig          |  7 ++--
>>>>    drivers/mfd/rts5227.c        | 77 ++++++++++++++++++++++++++++++++++++++++++--
>>>>    drivers/mfd/rtsx_pcr.c       |  5 +++
>>>>    drivers/mfd/rtsx_pcr.h       |  3 ++
>>>>    include/linux/mfd/rtsx_pci.h |  6 ++++
>>>>    5 files changed, 93 insertions(+), 5 deletions(-)
>>> I Acked this once already.
>>>
>>> What's changed since then?
>> It's not changed, but I don't have time to fix magic numbers these days,
>> so, I prefer you apply this patch not waiting next patch.
> Subsequent patches are irrelevant.  I Acked this patch, so the Ack
> should carry forward.
>
> I'll apply the patch for now, but please bear this in mind for the
> future.
>
> Patch applied, thanks.
>
>>>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>>>> index 6538159..614c146 100644
>>>> --- a/drivers/mfd/Kconfig
>>>> +++ b/drivers/mfd/Kconfig
>>>> @@ -686,9 +686,10 @@ config MFD_RTSX_PCI
>>>>    	select MFD_CORE
>>>>    	help
>>>>    	  This supports for Realtek PCI-Express card reader including rts5209,
>>>> -	  rts5229, rtl8411, etc. Realtek card reader supports access to many
>>>> -	  types of memory cards, such as Memory Stick, Memory Stick Pro,
>>>> -	  Secure Digital and MultiMediaCard.
>>>> +	  rts5227, rts522A, rts5229, rts5249, rts524A, rts525A, rtl8411, etc.
>>>> +	  Realtek card reader supports access to many types of memory cards,
>>>> +	  such as Memory Stick, Memory Stick Pro, Secure Digital and
>>>> +	  MultiMediaCard.
>>>>    
>>>>    config MFD_RT5033
>>>>    	tristate "Richtek RT5033 Power Management IC"
>>>> diff --git a/drivers/mfd/rts5227.c b/drivers/mfd/rts5227.c
>>>> index ce012d7..cf13e66 100644
>>>> --- a/drivers/mfd/rts5227.c
>>>> +++ b/drivers/mfd/rts5227.c
>>>> @@ -26,6 +26,14 @@
>>>>    
>>>>    #include "rtsx_pcr.h"
>>>>    
>>>> +static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr)
>>>> +{
>>>> +	u8 val;
>>>> +
>>>> +	rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
>>>> +	return val & 0x0F;
>>>> +}
>>>> +
>>>>    static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
>>>>    {
>>>>    	u8 driving_3v3[4][3] = {
>>>> @@ -88,7 +96,7 @@ static void rts5227_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
>>>>    	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0);
>>>>    
>>>>    	if (pm_state == HOST_ENTER_S3)
>>>> -		rtsx_pci_write_register(pcr, PM_CTRL3, 0x10, 0x10);
>>>> +		rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x10);
>>>>    
>>>>    	rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
>>>>    }
>>>> @@ -121,7 +129,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
>>>>    		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8);
>>>>    	else
>>>>    		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88);
>>>> -	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00);
>>>> +	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00);
>>>>    
>>>>    	return rtsx_pci_send_cmd(pcr, 100);
>>>>    }
>>>> @@ -298,8 +306,73 @@ void rts5227_init_params(struct rtsx_pcr *pcr)
>>>>    	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
>>>>    	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7);
>>>>    
>>>> +	pcr->ic_version = rts5227_get_ic_version(pcr);
>>>>    	pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl;
>>>>    	pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl;
>>>>    	pcr->ms_pull_ctl_enable_tbl = rts5227_ms_pull_ctl_enable_tbl;
>>>>    	pcr->ms_pull_ctl_disable_tbl = rts5227_ms_pull_ctl_disable_tbl;
>>>> +
>>>> +	pcr->reg_pm_ctrl3 = PM_CTRL3;
>>>> +}
>>>> +
>>>> +static int rts522a_optimize_phy(struct rtsx_pcr *pcr)
>>>> +{
>>>> +	int err;
>>>> +
>>>> +	err = rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, D3_DELINK_MODE_EN,
>>>> +		0x00);
>>>> +	if (err < 0)
>>>> +		return err;
>>>> +
>>>> +	if (is_version(pcr, 0x522A, IC_VER_A)) {
>>>> +		err = rtsx_pci_write_phy_register(pcr, PHY_RCR2,
>>>> +			PHY_RCR2_INIT_27S);
>>>> +		if (err)
>>>> +			return err;
>>>> +
>>>> +		rtsx_pci_write_phy_register(pcr, PHY_RCR1, PHY_RCR1_INIT_27S);
>>>> +		rtsx_pci_write_phy_register(pcr, PHY_FLD0, PHY_FLD0_INIT_27S);
>>>> +		rtsx_pci_write_phy_register(pcr, PHY_FLD3, PHY_FLD3_INIT_27S);
>>>> +		rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_INIT_27S);
>>>> +	}
>>>> +
>>>> +	return 0;
>>>> +}
>>>> +
>>>> +static int rts522a_extra_init_hw(struct rtsx_pcr *pcr)
>>>> +{
>>>> +	rts5227_extra_init_hw(pcr);
>>>> +
>>>> +	rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG,
>>>> +		FUNC_FORCE_UPME_XMT_DBG);
>>>> +	rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04);
>>>> +	rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0);
>>>> +	rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11);
>>>> +
>>>> +	return 0;
>>>> +}
>>>> +
>>>> +/* rts522a operations mainly derived from rts5227, except phy/hw init setting.
>>>> + */
>>>> +static const struct pcr_ops rts522a_pcr_ops = {
>>>> +	.fetch_vendor_settings = rts5227_fetch_vendor_settings,
>>>> +	.extra_init_hw = rts522a_extra_init_hw,
>>>> +	.optimize_phy = rts522a_optimize_phy,
>>>> +	.turn_on_led = rts5227_turn_on_led,
>>>> +	.turn_off_led = rts5227_turn_off_led,
>>>> +	.enable_auto_blink = rts5227_enable_auto_blink,
>>>> +	.disable_auto_blink = rts5227_disable_auto_blink,
>>>> +	.card_power_on = rts5227_card_power_on,
>>>> +	.card_power_off = rts5227_card_power_off,
>>>> +	.switch_output_voltage = rts5227_switch_output_voltage,
>>>> +	.cd_deglitch = NULL,
>>>> +	.conv_clk_and_div_n = NULL,
>>>> +	.force_power_down = rts5227_force_power_down,
>>>> +};
>>>> +
>>>> +void rts522a_init_params(struct rtsx_pcr *pcr)
>>>> +{
>>>> +	rts5227_init_params(pcr);
>>>> +
>>>> +	pcr->reg_pm_ctrl3 = RTS522A_PM_CTRL3;
>>>>    }
>>>> diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
>>>> index a66540a..ccd8918 100644
>>>> --- a/drivers/mfd/rtsx_pcr.c
>>>> +++ b/drivers/mfd/rtsx_pcr.c
>>>> @@ -55,6 +55,7 @@ static const struct pci_device_id rtsx_pci_ids[] = {
>>>>    	{ PCI_DEVICE(0x10EC, 0x5229), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>>    	{ PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>>    	{ PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>> +	{ PCI_DEVICE(0x10EC, 0x522A), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>>    	{ PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>>    	{ PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>>    	{ PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 },
>>>> @@ -1102,6 +1103,10 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
>>>>    		rts5227_init_params(pcr);
>>>>    		break;
>>>>    
>>>> +	case 0x522A:
>>>> +		rts522a_init_params(pcr);
>>>> +		break;
>>>> +
>>>>    	case 0x5249:
>>>>    		rts5249_init_params(pcr);
>>>>    		break;
>>>> diff --git a/drivers/mfd/rtsx_pcr.h b/drivers/mfd/rtsx_pcr.h
>>>> index ce48842..931d1ae 100644
>>>> --- a/drivers/mfd/rtsx_pcr.h
>>>> +++ b/drivers/mfd/rtsx_pcr.h
>>>> @@ -27,6 +27,8 @@
>>>>    #define MIN_DIV_N_PCR		80
>>>>    #define MAX_DIV_N_PCR		208
>>>>    
>>>> +#define RTS522A_PM_CTRL3		0xFF7E
>>>> +
>>>>    #define RTS524A_PME_FORCE_CTL		0xFF78
>>>>    #define RTS524A_PM_CTRL3		0xFF7E
>>>>    
>>>> @@ -38,6 +40,7 @@ void rts5229_init_params(struct rtsx_pcr *pcr);
>>>>    void rtl8411_init_params(struct rtsx_pcr *pcr);
>>>>    void rtl8402_init_params(struct rtsx_pcr *pcr);
>>>>    void rts5227_init_params(struct rtsx_pcr *pcr);
>>>> +void rts522a_init_params(struct rtsx_pcr *pcr);
>>>>    void rts5249_init_params(struct rtsx_pcr *pcr);
>>>>    void rts524a_init_params(struct rtsx_pcr *pcr);
>>>>    void rts525a_init_params(struct rtsx_pcr *pcr);
>>>> diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
>>>> index ff843e7..7eb7cba 100644
>>>> --- a/include/linux/mfd/rtsx_pci.h
>>>> +++ b/include/linux/mfd/rtsx_pci.h
>>>> @@ -589,6 +589,7 @@
>>>>    #define   FORCE_ASPM_NO_ASPM		0x00
>>>>    #define PM_CLK_FORCE_CTL		0xFE58
>>>>    #define FUNC_FORCE_CTL			0xFE59
>>>> +#define   FUNC_FORCE_UPME_XMT_DBG	0x02
>>>>    #define PERST_GLITCH_WIDTH		0xFE5C
>>>>    #define CHANGE_LINK_STATE		0xFE5B
>>>>    #define RESET_LOAD_REG			0xFE5E
>>>> @@ -712,6 +713,7 @@
>>>>    #define PHY_RCR1			0x02
>>>>    #define   PHY_RCR1_ADP_TIME_4		0x0400
>>>>    #define   PHY_RCR1_VCO_COARSE		0x001F
>>>> +#define   PHY_RCR1_INIT_27S		0x0A1F
>>>>    #define PHY_SSCCR2			0x02
>>>>    #define   PHY_SSCCR2_PLL_NCODE		0x0A00
>>>>    #define   PHY_SSCCR2_TIME0		0x001C
>>>> @@ -724,6 +726,7 @@
>>>>    #define   PHY_RCR2_FREQSEL_12		0x0040
>>>>    #define   PHY_RCR2_CDR_SC_12P		0x0010
>>>>    #define   PHY_RCR2_CALIB_LATE		0x0002
>>>> +#define   PHY_RCR2_INIT_27S		0xC152
>>>>    #define PHY_SSCCR3			0x03
>>>>    #define   PHY_SSCCR3_STEP_IN		0x2740
>>>>    #define   PHY_SSCCR3_CHECK_DELAY	0x0008
>>>> @@ -800,12 +803,14 @@
>>>>    #define   PHY_ANA1A_RXT_BIST		0x0500
>>>>    #define   PHY_ANA1A_TXR_BIST		0x0040
>>>>    #define   PHY_ANA1A_REV			0x0006
>>>> +#define   PHY_FLD0_INIT_27S		0x2546
>>>>    #define PHY_FLD1			0x1B
>>>>    #define PHY_FLD2			0x1C
>>>>    #define PHY_FLD3			0x1D
>>>>    #define   PHY_FLD3_TIMER_4		0x0800
>>>>    #define   PHY_FLD3_TIMER_6		0x0020
>>>>    #define   PHY_FLD3_RXDELINK		0x0004
>>>> +#define   PHY_FLD3_INIT_27S		0x0004
>>>>    #define PHY_ANA1D			0x1D
>>>>    #define   PHY_ANA1D_DEBUG_ADDR		0x0004
>>>>    #define _PHY_FLD0			0x1D
>>>> @@ -824,6 +829,7 @@
>>>>    #define   PHY_FLD4_BER_COUNT		0x00E0
>>>>    #define   PHY_FLD4_BER_TIMER		0x000A
>>>>    #define   PHY_FLD4_BER_CHK_EN		0x0001
>>>> +#define   PHY_FLD4_INIT_27S		0x5C7F
>>>>    #define PHY_DIG1E			0x1E
>>>>    #define   PHY_DIG1E_REV			0x4000
>>>>    #define   PHY_DIG1E_D0_X_D1		0x1000

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