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Message-ID: <561C3410.8090600@ti.com>
Date: Tue, 13 Oct 2015 03:58:32 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Yakir Yang <ykk@...k-chips.com>, Inki Dae <inki.dae@...sung.com>,
Andrzej Hajda <a.hajda@...sung.com>,
Joonyoung Shim <jy0922.shim@...sung.com>,
Seung-Woo Kim <sw0312.kim@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Jingoo Han <jingoohan1@...il.com>,
Thierry Reding <treding@...dia.com>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Rob Herring <robh+dt@...nel.org>, <joe@...ches.com>,
Heiko Stuebner <heiko@...ech.de>,
Mark Yao <mark.yao@...k-chips.com>
CC: Russell King <linux@....linux.org.uk>, <djkurtz@...omium.org>,
<dianders@...omium.org>, Sean Paul <seanpaul@...omium.org>,
Kukjin Kim <kgene@...nel.org>,
Kumar Gala <galak@...eaurora.org>, <emil.l.velikov@...il.com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Gustavo Padovan <gustavo.padovan@...labora.co.uk>,
Pawel Moll <pawel.moll@....com>, <ajaynumb@...il.com>,
<robherring2@...il.com>, <javier@....samsung.com>,
Andy Yan <andy.yan@...k-chips.com>,
<dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-samsung-soc@...r.kernel.org>,
<linux-rockchip@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp
phy
Hi,
On Saturday 10 October 2015 09:28 PM, Yakir Yang wrote:
> This phy driver is binded with the Rockchip DisplayPort
> driver, here are the brief properties:
> edp_phy: edp-phy@...70274 {
> compatible = "rockchip,rk3288-dp-phy";
> rockchip,grf = <&grf>;
> clocks = <&cru SCLK_EDP_24M>;
> clock-names = "24m";
> #phy-cells = <0>;
> };
The commit message can simply be "Add dt binding documentation for
rockchip display port PHY".
Thanks
Kishon
>
> Signed-off-by: Yakir Yang <ykk@...k-chips.com>
> ---
> Changes in v6: None
> Changes in v5:
> - Split binding doc's from driver changes. (Rob)
> - Update the rockchip,grf explain in document, and correct the clock required
> elemets in document. (Rob & Heiko)
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> .../devicetree/bindings/phy/rockchip-dp-phy.txt | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
> new file mode 100644
> index 0000000..505194e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
> @@ -0,0 +1,22 @@
> +Rockchip Soc Seroes Display Port PHY
> +------------------------------------
> +
> +Required properties:
> +- compatible : should be one of the following supported values:
> + - "rockchip.rk3288-dp-phy"
> +- clocks: from common clock binding: handle to dp clock.
> + of memory mapped region.
> +- clock-names: from common clock binding:
> + Required elements: "24m"
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> +- #phy-cells : from the generic PHY bindings, must be 0;
> +
> +Example:
> +
> +edp_phy: edp-phy@...70274 {
> + compatible = "rockchip,rk3288-dp-phy";
> + rockchip,grf = <&grf>;
> + clocks = <&cru SCLK_EDP_24M>;
> + clock-names = "24m";
> + #phy-cells = <0>;
> +};
>
--
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