linux-kernel - Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support

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Message-ID: <CANAwSgTGu+JeQjS__iZEiWx+rVF9OFmgne5_EgUXRnnStdqNUA@mail.gmail.com>
Date:	Tue, 13 Oct 2015 09:19:17 +0530
From:	Anand Moon <linux.amoon@...il.com>
To:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc:	Kukjin Kim <kgene@...nel.org>,
	Javier Martinez Canillas <javier@....samsung.com>,
	Lukasz Majewski <l.majewski@...sung.com>,
	Jaehoon Chung <jh80.chung@...sung.com>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	Linux Kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support

Hi Krzysztof,

On 13 October 2015 at 09:13, Krzysztof Kozlowski
<k.kozlowski@...sung.com> wrote:
> On 13.10.2015 12:08, Anand Moon wrote:
>> Hi Krzysztof,
>>
>> On 13 October 2015 at 05:44, Krzysztof Kozlowski
>> <k.kozlowski@...sung.com> wrote:
>>> On 13.10.2015 00:32, Anand Moon wrote:
>>>> Hi Krzysztof,
>>>>
>>>> On 12 October 2015 at 11:14, Krzysztof Kozlowski
>>>> <k.kozlowski@...sung.com> wrote:
>>>>> On 12.10.2015 00:46, Anand Moon wrote:
>>>>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
>>>>>
>>>>> This description is not entirely correct. The MMC driver already
>>>>> supports these UHS speeds (you did not any code) so you rather enabled
>>>>> it (description of bindings says "is supported").
>>>>>
>>>>> You mentioned DDR50 but I don't see respective property below.
>>>>>
>>>>> How do you know that these modes are really supported? I don't know. Can
>>>>> you convince me?
>>>>
>>>> Setting this DDR50 capability give me this error. That's the reason to
>>>> drop this capability.
>>>
>>> But you mentioned it in commit message! "Added support for UHS-I ...
>>> (DDR50)"
>>>
>>> In the same time dropping DDR50 is not an sufficient proof that "SDR50
>>> and SDR104 are really supported".
>>>
>>
>> These changes are related to the microSD card capabilities.
>> So SDR50 have better frequency over DDR50. On the same Sandisk card.
>>
>> When the card select the capability for DDR50
>> ---------------------------------------------------
>> [    4.001477] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot
>> req 50000000Hz, actual 50000000HZ div = 0)
>> [    4.001604] mmc1: new ultra high speed DDR50 SDHC card at address aaaa
>> [    4.004505] mmcblk0: mmc1:aaaa SL32G 29.7 GiB
>> [    4.009179] mmcblk0: error -110 sending status command, retrying
>> [    4.009271] mmcblk0: error -115 sending stop command, original cmd
>> response 0x900, card status 0x900
>> [    4.009275] mmcblk0: error -84 transferring data, sector 0, nr 8,
>> cmd response 0x900, card status 0x0
>> [    4.025563] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot
>> req 400000Hz, actual 396825HZ div = 63)
>> [    4.067770] Console: switching to colour frame buffer device 274x77
>> [    4.098782] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot
>> req 50000000Hz, actual 50000000HZ div = 0)
>> [    4.099692] mmc1: tried to reset card
>> [    4.101332]  mmcblk0: p1 p2
>>
>>
>> When the card select the capability for SDR50
>> ---------------------------------------------------------------------------------
>> [ 2.439806] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req
>> 100000000Hz, actual 100000000HZ div = 0)
>> [ 2.449729] mmc1: new ultra high speed SDR50 SDHC card at address aaaa
>> [ 2.455984] mmcblk0: mmc1:aaaa SL32G 29.7 GiB
>> [ 2.461743] mmcblk0: p1 p2
>>
>> Which will relate to better read/write speed.
>
> Which is not an answer to my question. To none of my previous questions.

OK, you are correct.Just ignore these changes.

-Anand Moon

>
> Best regards,
> Krzysztof
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