linux-kernel - Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05

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Date:	Tue, 13 Oct 2015 13:12:12 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Bjorn Helgaas <helgaas@...nel.org>
Cc:	Zhou Wang <wangzhou1@...ilicon.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>, jingoohan1@...il.com,
	pratyush.anand@...il.com, linux@....linux.org.uk,
	thomas.petazzoni@...e-electrons.com, gabriele.paoloni@...wei.com,
	lorenzo.pieralisi@....com, james.morse@....com,
	Liviu.Dudau@....com, jason@...edaemon.net, robh@...nel.org,
	gabriel.fernandez@...aro.org, Minghuan.Lian@...escale.com,
	linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	zhangjukuo@...wei.com, qiuzhenfa@...ilicon.com,
	liudongdong3@...wei.com, qiujiang@...wei.com, xuwei5@...ilicon.com,
	liguozhu@...ilicon.com, Kefeng Wang <wangkefeng.wang@...wei.com>,
	Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05

On Monday 12 October 2015 16:35:45 Bjorn Helgaas wrote:
> 
> > +{
> > +     u64 addr;
> > +     struct device_node *msi_node;
> > +     struct resource res;
> > +     struct device_node *np = pp->dev->of_node;
> > +     struct hisi_pcie *pcie = to_hisi_pcie(pp);
> > +
> > +     msi_node = of_parse_phandle(np, "msi-parent", 0);
> > +     if (!msi_node) {
> > +             dev_err(pp->dev, "failed to find msi-parent\n");
> > +             return -EINVAL;
> > +     }
> > +     of_address_to_resource(msi_node, 0, &res);
> 
> Does this use the "msi-parent" node in the same way as other drivers
> do?  I'm sure there must be other places where we extract struct
> resource information from an "msi-parent" node, but I don't see them.
> 
> I'm trying to verify that this isn't some kind of incompatible
> extension of the "msi-parent" property.  I cc'd Arnd and Rob (DT
> experts).

This is not ok, what this does is that it relies on a particular
implementation of the MSI controller and directly accesses its
registers.

Instead, it should reference only the msi irq domain and let the
driver for the MSI controller access the registers. Otherwise this
code has to be rewritten once the same PCI host code appears in
a machine that has a real GICv2m or GICv3.

	Arnd
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