lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <230CBA6E4B6B6B418E8730AC28E6FC7E042289A5@DFLE11.ent.ti.com>
Date:	Tue, 13 Oct 2015 20:12:18 +0000
From:	"Kwok, WingMan" <w-kwok2@...com>
To:	"Karicheri, Muralidharan" <m-karicheri2@...com>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"galak@...eaurora.org" <galak@...eaurora.org>,
	KISHON VIJAY ABRAHAM <kishon@...com>,
	"Quadros, Roger" <rogerq@...com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"ssantosh@...nel.org" <ssantosh@...nel.org>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH 3/3] ARM: keystone: dts: add PCI serdes driver bindings



> -----Original Message-----
> From: Karicheri, Muralidharan
> Sent: Tuesday, October 13, 2015 2:24 PM
> To: Kwok, WingMan; robh+dt@...nel.org; pawel.moll@....com;
> mark.rutland@....com; ijc+devicetree@...lion.org.uk; galak@...eaurora.org;
> KISHON VIJAY ABRAHAM; Quadros, Roger; bhelgaas@...gle.com;
> ssantosh@...nel.org; linux@....linux.org.uk; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-pci@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org
> Subject: Re: [PATCH 3/3] ARM: keystone: dts: add PCI serdes driver bindings
> 
> On 10/13/2015 02:04 PM, WingMan Kwok wrote:
> > Signed-off-by: WingMan Kwok <w-kwok2@...com>
> > ---
> >   arch/arm/boot/dts/k2e.dtsi      |   24 ++++++++++++++++++++++++
> >   arch/arm/boot/dts/keystone.dtsi |   25 +++++++++++++++++++++++++
> >   2 files changed, 49 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> > index 675fb8e..1ba47d8 100644
> > --- a/arch/arm/boot/dts/k2e.dtsi
> > +++ b/arch/arm/boot/dts/k2e.dtsi
> > @@ -86,6 +86,18 @@
> >   			gpio,syscon-dev = <&devctrl 0x240>;
> >   		};
> >
> > +		pcie1_phy: pciephy@...6000 {
> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02326000 0x4000>;
> > +			reg-names = "reg_serdes";
> > +			refclk-khz = <100000>;
> > +			link-rate-kbps = <5000000>;
> > +			phy-type = "pcie";
> > +			max-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >   		pcie1: pcie@...20000 {
> >   			compatible = "ti,keystone-pcie","snps,dw-pcie";
> >   			clocks = <&clkpcie1>;
> > @@ -130,6 +142,18 @@
> >   					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
> >   					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
> >   			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes@0 {
> > +					reg = <0>;
> > +					phys = <&pcie1_phy>;
> > +					status = "disabled";
> > +				};
> > +			};
> > +
> >   		};
> >
> >   		mdio: mdio@...00f00 {
> > diff --git a/arch/arm/boot/dts/keystone.dtsi
> b/arch/arm/boot/dts/keystone.dtsi
> > index 72816d6..5312319 100644
> > --- a/arch/arm/boot/dts/keystone.dtsi
> > +++ b/arch/arm/boot/dts/keystone.dtsi
> > @@ -275,6 +275,19 @@
> >   			ti,syscon-dev = <&devctrl 0x2a0>;
> >   		};
> >
> > +		pcie0_phy: pciephy@...0000 {
> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02320000 0x4000>;
> > +			reg-names = "reg_serdes";
> > +			refclk-khz = <100000>;
> > +			link-rate-kbps = <5000000>;
> > +			init-firmware	= "k2_pcie_serdes_init.fw";
> > +			phy-type = "pcie";
> > +			max-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >   		pcie0: pcie@...00000 {
> >   			compatible = "ti,keystone-pcie", "snps,dw-pcie";
> >   			clocks = <&clkpcie>;
> > @@ -319,6 +332,18 @@
> >   					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
> >   					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
> >   			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes@0 {
> > +					reg = <0>;
> > +					phys = <&pcie0_phy>;
> > +					status = "disabled";
> > +				};
> > +			};
> > +
> >   		};
> >   	};
> >   };
> >
> Wingman,
> 
> This should be a separate patch and remove the sane from Driver patch.
> i.e. send 1/3 ane 2/3 in one series and 3/3 as a separate patch.
> 

will do.

Thanks,
wingMan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ