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Message-ID: <561E1A77.1060902@arm.com>
Date: Wed, 14 Oct 2015 10:03:51 +0100
From: "Suzuki K. Poulose" <Suzuki.Poulose@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: catalin.marinas@....com, will.deacon@....com, mark.rutland@....com,
dave.martin@....com, Vladimir.Murzin@....com,
steve.capper@...aro.org, linux-kernel@...r.kernel.org,
ard.biesheuvel@...aro.org, james.morse@....com,
marc.zyngier@....com, christoffer.dall@...aro.org,
andre.przywara@....com, edward.nevill@...aro.org, aph@...hat.com,
ryan.arnold@...aro.org
Subject: Re: [PATCH v3 24/24] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1
to sysfs
On 13/10/15 18:22, Suzuki K. Poulose wrote:
> From: Steve Capper <steve.capper@...aro.org>
>
> It can be useful for JIT software to be aware of MIDR_EL1 and
> REVIDR_EL1 to ascertain the presence of any core errata that could
> affect codegen.
>
> This patch exposes these registers through sysfs:
>
> /sys/devices/system/cpu/cpu$ID/identification/midr
> /sys/devices/system/cpu/cpu$ID/identification/revidr
>
> where $ID is the cpu number. For big.LITTLE systems, one can have a
> mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need
> to be enumerated.
>
> If the kernel does not have valid information to populate these entries
> with, an empty string is returned to userspace.
>
For the record:
> Signed-off-by: Steve Capper <steve.capper@...aro.org>
[ Added error code for cpus !present in show_xxx_name ]
> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@....com>
Suzuki
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