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Message-Id: <1444819457-27519-1-git-send-email-tomeu.vizoso@collabora.com>
Date: Wed, 14 Oct 2015 12:44:15 +0200
From: Tomeu Vizoso <tomeu.vizoso@...labora.com>
To: linux-kernel@...r.kernel.org
Cc: Gustavo Padovan <gustavo.padovan@...labora.co.uk>,
Javier Martinez Canillas <javier@....samsung.com>,
Seung-Woo Kim <sw0312.kim@...sung.com>,
Kukjin Kim <kgene@...nel.org>, Inki Dae <inki.dae@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Joonyoung Shim <jy0922.shim@...sung.com>,
Tomeu Vizoso <tomeu.vizoso@...labora.com>,
devicetree@...r.kernel.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Kumar Gala <galak@...eaurora.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
linux-samsung-soc@...r.kernel.org,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Pawel Moll <pawel.moll@....com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@....linux.org.uk>,
Tomasz Figa <tomasz.figa@...il.com>, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 0/2] Fix display on second resume on 5250-snow
Hi,
as discussed in [0], currently on the second resume from memory the
display is broken on Snow boards (ARM Samsung Series 3 Chromebook).
The reason is that on resume the contents of register SRC_TOP3 aren't
what the kernel thinks they are because the HW (or FW) is doing some
clock reparenting beneath our feet.
This series tasks the kernel to do the reparenting itself so that the HW
state always matches the kernel's internal state.
Thanks,
Tomeu
[0] http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
Tomeu Vizoso (2):
clk: samsung: exynos5250: Add DISP1 clocks
ARM: dts: exynos5250: Add clocks to DISP1 domain
arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
drivers/clk/samsung/clk-exynos5250.c | 16 +++++++++++++++-
include/dt-bindings/clock/exynos5250.h | 4 +++-
3 files changed, 22 insertions(+), 2 deletions(-)
--
2.5.0
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