linux-kernel - [PATCH v5 15/24] dmaengine: edma: Use dev_dbg instead pr

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Message-ID: <1444822986-20562-16-git-send-email-peter.ujfalusi@ti.com>
Date:	Wed, 14 Oct 2015 14:42:57 +0300
From:	Peter Ujfalusi <peter.ujfalusi@...com>
To:	<vinod.koul@...el.com>, <nsekhar@...com>, <linux@....linux.org.uk>
CC:	<olof@...om.net>, <arnd@...db.de>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <linux-omap@...r.kernel.org>,
	<dmaengine@...r.kernel.org>
Subject: [PATCH v5 15/24] dmaengine: edma: Use dev_dbg instead pr_debug

We have access to dev, so it is better to use the dev_dbg for debug prints.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@...com>
---
 drivers/dma/edma.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index a9fe5c92451d..08f9bd0aa0b3 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -676,23 +676,23 @@ static int edma_start(struct edma_cc *ecc, unsigned channel)
 
 		/* EDMA channels without event association */
 		if (test_bit(channel, ecc->edma_unused)) {
-			pr_debug("EDMA: ESR%d %08x\n", j,
-				 edma_shadow0_read_array(ecc, SH_ESR, j));
+			dev_dbg(ecc->dev, "ESR%d %08x\n", j,
+				edma_shadow0_read_array(ecc, SH_ESR, j));
 			edma_shadow0_write_array(ecc, SH_ESR, j, mask);
 			return 0;
 		}
 
 		/* EDMA channel with event association */
-		pr_debug("EDMA: ER%d %08x\n", j,
-			 edma_shadow0_read_array(ecc, SH_ER, j));
+		dev_dbg(ecc->dev, "ER%d %08x\n", j,
+			edma_shadow0_read_array(ecc, SH_ER, j));
 		/* Clear any pending event or error */
 		edma_write_array(ecc, EDMA_ECR, j, mask);
 		edma_write_array(ecc, EDMA_EMCR, j, mask);
 		/* Clear any SER */
 		edma_shadow0_write_array(ecc, SH_SECR, j, mask);
 		edma_shadow0_write_array(ecc, SH_EESR, j, mask);
-		pr_debug("EDMA: EER%d %08x\n", j,
-			 edma_shadow0_read_array(ecc, SH_EER, j));
+		dev_dbg(ecc->dev, "EER%d %08x\n", j,
+			edma_shadow0_read_array(ecc, SH_EER, j));
 		return 0;
 	}
 
@@ -730,8 +730,8 @@ static void edma_stop(struct edma_cc *ecc, unsigned channel)
 		/* clear possibly pending completion interrupt */
 		edma_shadow0_write_array(ecc, SH_ICR, j, mask);
 
-		pr_debug("EDMA: EER%d %08x\n", j,
-			 edma_shadow0_read_array(ecc, SH_EER, j));
+		dev_dbg(ecc->dev, "EER%d %08x\n", j,
+			edma_shadow0_read_array(ecc, SH_EER, j));
 
 		/* REVISIT:  consider guarding against inappropriate event
 		 * chaining by overwriting with dummy_paramset.
@@ -800,8 +800,8 @@ static int edma_trigger_channel(struct edma_cc *ecc, unsigned channel)
 
 	edma_shadow0_write_array(ecc, SH_ESR, (channel >> 5), mask);
 
-	pr_debug("EDMA: ESR%d %08x\n", (channel >> 5),
-		 edma_shadow0_read_array(ecc, SH_ESR, (channel >> 5)));
+	dev_dbg(ecc->dev, "ESR%d %08x\n", (channel >> 5),
+		edma_shadow0_read_array(ecc, SH_ESR, (channel >> 5)));
 	return 0;
 }
 
@@ -831,8 +831,8 @@ static void edma_clean_channel(struct edma_cc *ecc, unsigned channel)
 		int j = (channel >> 5);
 		unsigned int mask = BIT(channel & 0x1f);
 
-		pr_debug("EDMA: EMR%d %08x\n", j,
-			 edma_read_array(ecc, EDMA_EMR, j));
+		dev_dbg(ecc->dev, "EMR%d %08x\n", j,
+			edma_read_array(ecc, EDMA_EMR, j));
 		edma_shadow0_write_array(ecc, SH_ECR, j, mask);
 		/* Clear the corresponding EMR bits */
 		edma_write_array(ecc, EDMA_EMCR, j, mask);
-- 
2.6.1

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