linux-kernel - Re: [PATCH v7 9/9] arm64: dts: mt8173: Add subsystem clock controller device nodes

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Message-ID: <561E580D.4090706@gmail.com>
Date:	Wed, 14 Oct 2015 15:26:37 +0200
From:	Matthias Brugger <matthias.bgg@...il.com>
To:	James Liao <jamesjj.liao@...iatek.com>,
	Mike Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Heiko Stubner <heiko@...ech.de>
Cc:	srv_heupstream@...iatek.com, Daniel Kurtz <djkurtz@...omium.org>,
	Ricky Liang <jcliang@...omium.org>,
	Rob Herring <robh+dt@...nel.org>,
	Sascha Hauer <kernel@...gutronix.de>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v7 9/9] arm64: dts: mt8173: Add subsystem clock controller
 device nodes



On 10/08/15 11:50, James Liao wrote:
> This patch adds device nodes providing subsystem clocks on MT8173,
> includes mmsys, imgsys, vdecsys, vencsys and vencltsys.
>
> Signed-off-by: James Liao <jamesjj.liao@...iatek.com>
> ---

Applied, thanks.

>   arch/arm64/boot/dts/mediatek/mt8173.dtsi | 37 ++++++++++++++++++++++++++++++++
>   1 file changed, 37 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index a2f63e4..32c85cc 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -102,6 +102,13 @@
>   		clock-output-names = "clk32k";
>   	};
>
> +	cpum_ck: oscillator@2 {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <0>;
> +		clock-output-names = "cpum_ck";
> +	};
> +
>   	timer {
>   		compatible = "arm,armv8-timer";
>   		interrupt-parent = <&gic>;
> @@ -227,6 +234,36 @@
>   			clocks = <&uart_clk>;
>   			status = "disabled";
>   		};
> +
> +		mmsys: clock-controller@...00000 {
> +			compatible = "mediatek,mt8173-mmsys", "syscon";
> +			reg = <0 0x14000000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		imgsys: clock-controller@...00000 {
> +			compatible = "mediatek,mt8173-imgsys", "syscon";
> +			reg = <0 0x15000000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		vdecsys: clock-controller@...00000 {
> +			compatible = "mediatek,mt8173-vdecsys", "syscon";
> +			reg = <0 0x16000000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		vencsys: clock-controller@...00000 {
> +			compatible = "mediatek,mt8173-vencsys", "syscon";
> +			reg = <0 0x18000000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		vencltsys: clock-controller@...00000 {
> +			compatible = "mediatek,mt8173-vencltsys", "syscon";
> +			reg = <0 0x19000000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
>   	};
>   };
>
>
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