| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <561E7A7D.3020207@arm.com> Date: Wed, 14 Oct 2015 16:53:33 +0100 From: "Suzuki K. Poulose" <Suzuki.Poulose@....com> To: Jeremy Linton <jeremy.linton@....com>, linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org, catalin.marinas@....com, will.deacon@....com, mark.rutland@....com, steve.capper@...aro.org, marc.zyngier@....com, ard.biesheuvel@...aro.org, christoffer.dall@...aro.org Subject: Re: [PATCHv3 10/11] arm64: Add 16K page size support On 14/10/15 16:40, Jeremy Linton wrote: > On 10/14/2015 06:20 AM, Suzuki K. Poulose wrote: >> diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h >> index da32354..736ed4c 100644 >> --- a/arch/arm64/include/asm/page.h >> +++ b/arch/arm64/include/asm/page.h >> @@ -24,6 +24,9 @@ >> #ifdef CONFIG_ARM64_64K_PAGES >> #define PAGE_SHIFT 16 >> #define CONT_SHIFT 5 >> +#elif defined(CONFIG_ARM64_16K_PAGES) >> +#define PAGE_SHIFT 14 >> +#define CONT_SHIFT 9 >> #else >> #define PAGE_SHIFT 12 >> #define CONT_SHIFT 4 > > Suzuki, > > Is CONT_SHIFT correct? I thought it should be 7? The ARM-ARM says that a contiguous 3rd level lookup is 128 entries. > Err, you are right. I tested it with 9 and I still got contiguous mappings. May be because we anyway have 7 contiguous bits and the kernel text is read-only. I will fix that, thanks for spotting. Suzuki -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists