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Message-ID: <1444897847-18040-6-git-send-email-thunder.leizhen@huawei.com>
Date: Thu, 15 Oct 2015 16:30:47 +0800
From: Zhen Lei <thunder.leizhen@...wei.com>
To: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Joerg Roedel <joro@...tes.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
iommu <iommu@...ts.linux-foundation.org>,
Robin Murphy <robin.murphy@....com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
linux-kernel <linux-kernel@...r.kernel.org>
CC: Zefan Li <lizefan@...wei.com>, Xinwei Hu <huxinwei@...wei.com>,
"Tianhong Ding" <dingtianhong@...wei.com>,
Hanjun Guo <guohanjun@...wei.com>,
Zhen Lei <thunder.leizhen@...wei.com>
Subject: [PATCH v4 5/5] iommu/arm-smmu: describe the limitation of #iommu-cells
Only support #iommu-cells = <1>.
Signed-off-by: Zhen Lei <thunder.leizhen@...wei.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index 947863a..4845d44 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
@@ -5,6 +5,12 @@ revisions, replacing the MMIO register interface with in-memory command
and event queues and adding support for the ATS and PRI components of
the PCIe specification.
+Please read ./iommu.txt first, here list something special as below:
+
+** SMMUv3 limited properties:
+- #iommu-cells : fixed to <1>. The pci root device is a special case,
+ its IDs can be omitted in dts, seems #iommu-cells = <0>.
+
** SMMUv3 required properties:
- compatible : Should include:
--
2.5.0
--
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