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Date:	Thu, 15 Oct 2015 17:03:04 +0200
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Jian Zhou <jianjay.zhou@...wei.com>, herongguang.he@...wei.com,
	zhang.zhanghailiang@...wei.com, gleb@...nel.org,
	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
	x86@...nel.org, kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:	weidong.huang@...wei.com, peter.huangpeng@...wei.com
Subject: Re: [PATCH] KVM: VMX: enable LBR virtualization



On 15/10/2015 15:51, Jian Zhou wrote:
> 
> 
> On 2015/10/14 19:30, Paolo Bonzini wrote:
>>
>>
>> On 14/10/2015 13:26, Jian Zhou wrote:
>>> On 12/10/2015 20:44, Paolo Bonzini wrote:
>>>> In addition, the MSR numbers may differ between the guest and the host,
>>>> because it is possible to emulate e.g. a Core CPU on a Core 2 CPU. 
>>>> So I
>>>> recommend against using the atomic switch mechanism for the from/to
>>>> MSRs.
>>>
>>>    The vLBR feature depends on vPMU, and to enable vPMU, it needs to
>>>    specify the "cpu mode" in the guest XML as host-passthrough. I think
>>>    the MSR numbers between the guest and the host are the same in this
>>>    senario.
>>
>> Does it depend on vPMU _for Linux guests_ or in general?  My impression
>> is that LBR can be used by the guest independent of the PMU.
> 
>   I think only for Linux guests.
> 
>   I googled how to enable LBR on other guests(except Linux guests),
>   e.g. Windows, and got no developer manuals about it.
> 
>   Here is an article about it:
>   http://www.codeproject.com/Articles/517466/Last-branch-records-
>   and-branch-tracing
>   it says:
>   "bit 8 of DR7 represents bit 0 of DebugCtl. This is the LBR bit."

Don't worry about the operating system in the guest: you are just
emulating a processor feature, you do not care about anything except
what is written in the Intel SDM.

You can use kvm-unit-tests
(https://git.kernel.org/cgit/virt/kvm/kvm-unit-tests.git/) to write a
test for your feature.  There are existing tests for debugging features.

Thanks,

Paolo
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