linux-kernel - Re: [PATCH 01/10] clk: rockchip: Add sclk_mipidsi

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20151016213940.GA10182@codeaurora.org>
Date:	Fri, 16 Oct 2015 14:39:40 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Chris Zhong <zyw@...k-chips.com>
Cc:	heiko@...ech.de, linux-rockchip@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
	Michael Turquette <mturquette@...libre.com>,
	Jeff Chen <cym@...k-chips.com>, linux-kernel@...r.kernel.org,
	Doug Anderson <dianders@...omium.org>,
	Kumar Gala <galak@...eaurora.org>,
	"David S. Miller" <davem@...emloft.net>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Sonny Rao <sonnyrao@...omium.org>,
	Rob Herring <robh+dt@...nel.org>,
	linux-arm-kernel@...ts.infradead.org,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Huang Lin <hl@...k-chips.com>,
	Roger Chen <roger.chen@...k-chips.com>,
	Alexandru M Stan <amstan@...omium.org>
Subject: Re: [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi

On 10/10, Chris Zhong wrote:
> sclk_mipidsi_24m is the gating of mipi dsi phy.
> 
> Signed-off-by: Chris Zhong <zyw@...k-chips.com>
> ---

Acked-by: Stephen Boyd <sboyd@...eaurora.org>

> 
>  drivers/clk/rockchip/clk-rk3288.c      | 2 +-
>  include/dt-bindings/clock/rk3288-cru.h | 1 +
>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> index 9040878..c7d7ebf 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>  	GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
>  	GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
>  	GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
> -	GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
> +	GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
>  

It would have been better to make #defines for all these clocks
even if they weren't going to be used here. Then we could have
applied this patch directly to clk tree without having a clk tree
to arm-soc dependency. </grumble>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/