linux-kernel - Re: [PATCH v10 3/3] arm64: dts: mediatek: add xHCI & usb phy for mt8173

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Message-ID: <56237BF2.5070809@cogentembedded.com>
Date:	Sun, 18 Oct 2015 14:01:06 +0300
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	Chunfeng Yun <chunfeng.yun@...iatek.com>,
	Mathias Nyman <mathias.nyman@...el.com>
Cc:	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Felipe Balbi <balbi@...com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Roger Quadros <rogerq@...com>, linux-usb@...r.kernel.org,
	linux-mediatek@...ts.infradead.org,
	John Crispin <blogic@...nwrt.org>,
	Daniel Kurtz <djkurtz@...omium.org>,
	Kishon Vijay Abraham I <kishon@...com>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Subject: Re: [PATCH v10 3/3] arm64: dts: mediatek: add xHCI & usb phy for
 mt8173

Hello.

On 10/18/2015 6:51 AM, Chunfeng Yun wrote:

> add xHCI and phy drivers for MT8173-EVB
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>

[...]

> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index d18ee42..46f5f50 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
[...]
> @@ -487,6 +488,47 @@
>   			clock-names = "source", "hclk";
>   			status = "disabled";
>   		};
> +
> +		usb30: usb@...70000 {
> +			compatible = "mediatek,mt8173-xhci";
> +			reg = <0 0x11270000 0 0x1000>,
> +			      <0 0x11280700 0 0x0100>;
> +			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> +			power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> +			clocks = <&topckgen CLK_TOP_USB30_SEL>,
> +				 <&pericfg CLK_PERI_USB0>,
> +				 <&pericfg CLK_PERI_USB1>;
> +			clock-names = "sys_ck",
> +				      "wakeup_deb_p0",
> +				      "wakeup_deb_p1";
> +			phys = <&phy_port0 PHY_TYPE_USB3>,
> +			       <&phy_port1 PHY_TYPE_USB2>;
> +			mediatek,syscon-wakeup = <&pericfg>;
> +			status = "okay";
> +		};
> +
> +		u3phy: usb-phy@...90000 {
> +			compatible = "mediatek,mt8173-u3phy";
> +			reg = <0 0x11290000 0 0x800>;
> +			clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
> +			clock-names = "u3phya_ref";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +			status = "okay";

    Don't you need the "power-domains" prop here as well?

> +
> +			phy_port0: port@...90800 {
> +				reg = <0 0x11290800 0 0x800>;
> +				#phy-cells = <1>;
> +				status = "okay";
> +			};
> +
> +			phy_port1: port@...91000 {
> +				reg = <0 0x11291000 0 0x800>;
> +				#phy-cells = <1>;
> +				status = "okay";
> +			};
> +		};
>   	};
>   };
>

MBR, Sergei

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