linux-kernel - RE: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings

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Message-ID: <230CBA6E4B6B6B418E8730AC28E6FC7E04229107@DFLE11.ent.ti.com>
Date:	Mon, 19 Oct 2015 11:10:04 +0000
From:	"Kwok, WingMan" <w-kwok2@...com>
To:	"Quadros, Roger" <rogerq@...com>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"galak@...eaurora.org" <galak@...eaurora.org>,
	KISHON VIJAY ABRAHAM <kishon@...com>,
	"Karicheri, Muralidharan" <m-karicheri2@...com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"ssantosh@...nel.org" <ssantosh@...nel.org>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings

Roger,

> -----Original Message-----
> From: Quadros, Roger
> Sent: Friday, October 16, 2015 3:56 AM
> To: Kwok, WingMan; robh+dt@...nel.org; pawel.moll@....com;
> mark.rutland@....com; ijc+devicetree@...lion.org.uk; galak@...eaurora.org;
> KISHON VIJAY ABRAHAM; Karicheri, Muralidharan; bhelgaas@...gle.com;
> ssantosh@...nel.org; linux@....linux.org.uk; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-pci@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org
> Subject: Re: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings
> 
> WingMan,
> 
> On 15/10/15 17:27, WingMan Kwok wrote:
> > This patch adds the required PCI serdes bindings whcih can then be
> > enabled by setting the corresponding statuses to "ok" in order to
> > configure and start the PCI serdes.
> >
> > This patch depends on the updates to the Keystone PCIe host driver
> > and common serdes driver patch series that is submitted separately.
> >
> > Signed-off-by: WingMan Kwok <w-kwok2@...com>
> > ---
> >  arch/arm/boot/dts/k2e.dtsi      |   21 +++++++++++++++++++++
> >  arch/arm/boot/dts/keystone.dtsi |   21 +++++++++++++++++++++
> >  2 files changed, 42 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> > index 675fb8e..3b36575 100644
> > --- a/arch/arm/boot/dts/k2e.dtsi
> > +++ b/arch/arm/boot/dts/k2e.dtsi
> > @@ -86,6 +86,16 @@
> >  			gpio,syscon-dev = <&devctrl 0x240>;
> >  		};
> >
> > +		pcie1_phy: pciephy@...6000 {
> 
> Should be
> 		pcie1_phy: phy@...6000 {
> 

will change in next version.

> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02326000 0x4000>;
> > +			reg-names = "serdes";
> > +			link-rate-kbps = <5000000>;
> > +			num-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie1: pcie@...20000 {
> >  			compatible = "ti,keystone-pcie","snps,dw-pcie";
> >  			clocks = <&clkpcie1>;
> > @@ -130,6 +140,17 @@
> >  					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
> >  					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
> >  			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes@0 {
> > +					reg = <0>;
> > +					phys = <&pcie1_phy>;
> > +				};
> > +			};
> > +
> >  		};
> >
> >  		mdio: mdio@...00f00 {
> > diff --git a/arch/arm/boot/dts/keystone.dtsi
> b/arch/arm/boot/dts/keystone.dtsi
> > index 72816d6..6566cc4 100644
> > --- a/arch/arm/boot/dts/keystone.dtsi
> > +++ b/arch/arm/boot/dts/keystone.dtsi
> > @@ -275,6 +275,16 @@
> >  			ti,syscon-dev = <&devctrl 0x2a0>;
> >  		};
> >
> > +		pcie0_phy: pciephy@...0000 {
> 
> ditto.
> 

will change in next version.

> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02320000 0x4000>;
> > +			reg-names = "serdes";
> > +			link-rate-kbps = <5000000>;
> > +			num-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie0: pcie@...00000 {
> >  			compatible = "ti,keystone-pcie", "snps,dw-pcie";
> >  			clocks = <&clkpcie>;
> > @@ -319,6 +329,17 @@
> >  					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
> >  					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
> >  			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes@0 {
> > +					reg = <0>;
> > +					phys = <&pcie0_phy>;
> > +				};
> > +			};
> > +
> >  		};
> >  	};
> >  };
> >
> 
> --
> cheers,
> -roger

Thanks,
WingMan