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Message-ID: <20151019152108.GC11226@e104818-lin.cambridge.arm.com>
Date: Mon, 19 Oct 2015 16:21:08 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Ingo Molnar <mingo@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
Will Deacon <will.deacon@....com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Oleg Nesterov <oleg@...hat.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: Q: schedule() and implied barriers on arm64
On Mon, Oct 19, 2015 at 09:06:05AM +0200, Ingo Molnar wrote:
> * Peter Zijlstra <peterz@...radead.org> wrote:
>
> > In any case, its all moot now, since Paul no longer requires schedule() to imply
> > a full barrier.
> >
> > [...]
>
> Nevertheless from a least-surprise POV it might be worth guaranteeing it, because
> I bet there's tons of code that assumes that schedule() is a heavy operation and
> it's such an easy mistake to make. Since we are so close to having that guarantee,
> we might as well codify it?
FWIW, the arm64 __switch_to() has a heavy barrier (DSB) but the reason
for this was to cope with potentially interrupted cache or TLB
maintenance (which require a DSB on the same CPU) and thread migration
to another CPU.
--
Catalin
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