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Message-ID: <CAAtXAHdxUJSKBmtRB-5WgO2j-=Oxw=U8_ze6jQq2ORu-huk-Rg@mail.gmail.com>
Date:	Mon, 19 Oct 2015 09:25:46 -0700
From:	Moritz Fischer <moritz.fischer@...us.com>
To:	Michal Simek <michal.simek@...inx.com>
Cc:	Josh Cartwright <joshc@...com>, Rob Herring <robh+dt@...nel.org>,
	"pawel.moll@....com" <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Sören Brinkmann <soren.brinkmann@...inx.com>,
	Russell King <linux@....linux.org.uk>,
	Alan Tull <atull@...nsource.altera.com>,
	Greg KH <gregkh@...uxfoundation.org>,
	devicetree@...r.kernel.org,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCHv2 0/3] Adding FPGA Manager support for Xilinx Zynq

On Mon, Oct 19, 2015 at 7:12 AM, Michal Simek <michal.simek@...inx.com> wrote:
> On 10/18/2015 09:08 PM, Josh Cartwright wrote:
>> On Fri, Oct 16, 2015 at 03:42:27PM -0700, Moritz Fischer wrote:
>>> Hi all,
>>>
>>> I've tried to address most of the feedback that was brought up,
>>> the one thing I haven't looked at was the firmware format part,
>>> since that was still in discussion.
>>> So I'm still open to suggestions on how to handle this.
>>
>> Was there disagreement?  I had thought we settled on limiting the
>> handling the BIN format explicitly, the rest of the thread was about
>> userspace tooling for BIT->BIN conversion.
>
> yep. Only BIN handling and keep small BIN header with sync word.

Greg had already queued the v2 this weekend (which caught me by
suprise). I tried to figure out if it's possible to send a v3,
but he said to send follow up patches as he can't rebase the branch he
merged it into.
I will have access to hardware this afternoon, and send out follow up
patches to fix the BIN vs BIT issue.

>
> Thanks,
> Michal
>
Cheers,

Moritz
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