linux-kernel - Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power

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Date:	Tue, 20 Oct 2015 12:13:33 +0530
From:	AnjuTSudhakar <anju@...ux.vnet.ibm.com>
To:	Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>,
	linux-kernel@...r.kernel.org
Cc:	linuxppc-dev@...ts.ozlabs.org, sukadev@...ux.vnet.ibm.com,
	acme@...hat.com, mpe@...erman.id.au, dsahern@...il.com,
	jolsa@...hat.com, khandual@...ux.vnet.ibm.com,
	hemant@...ux.vnet.ibm.com
Subject: Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state
 in power

Hi maddy,
On Tuesday 20 October 2015 09:46 AM, Madhavan Srinivasan wrote:
>
> On Monday 19 October 2015 05:48 PM, Anju T wrote:
>> From: Anju <anju@...ux.vnet.ibm.com>
>>
>> The enum definition assigns an 'id' to each register in power.
> I guess it should be "each register in "struct pt_regs" of arch/powerpc
Right, that seems better.Will change the description like that.

Thanks a lot for reviewing the patch .
>> The order of these values in the enum definition are based on
>> the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h .
>>
>> Signed-off-by: Anju T <anju@...ux.vnet.ibm.com>
>> ---
>>   arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
>>   1 file changed, 55 insertions(+)
>>   create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>>
>> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
>> new file mode 100644
>> index 0000000..b97727c
>> --- /dev/null
>> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
>> @@ -0,0 +1,55 @@
>> +#ifndef _ASM_POWERPC_PERF_REGS_H
>> +#define _ASM_POWERPC_PERF_REGS_H
>> +
>> +enum perf_event_powerpc_regs {
>> +	PERF_REG_POWERPC_GPR0,
>> +	PERF_REG_POWERPC_GPR1,
>> +	PERF_REG_POWERPC_GPR2,
>> +	PERF_REG_POWERPC_GPR3,
>> +	PERF_REG_POWERPC_GPR4,
>> +	PERF_REG_POWERPC_GPR5,
>> +	PERF_REG_POWERPC_GPR6,
>> +	PERF_REG_POWERPC_GPR7,
>> +	PERF_REG_POWERPC_GPR8,
>> +	PERF_REG_POWERPC_GPR9,
>> +	PERF_REG_POWERPC_GPR10,
>> +	PERF_REG_POWERPC_GPR11,
>> +	PERF_REG_POWERPC_GPR12,
>> +	PERF_REG_POWERPC_GPR13,
>> +	PERF_REG_POWERPC_GPR14,
>> +	PERF_REG_POWERPC_GPR15,
>> +	PERF_REG_POWERPC_GPR16,
>> +	PERF_REG_POWERPC_GPR17,
>> +	PERF_REG_POWERPC_GPR18,
>> +	PERF_REG_POWERPC_GPR19,
>> +	PERF_REG_POWERPC_GPR20,
>> +	PERF_REG_POWERPC_GPR21,
>> +	PERF_REG_POWERPC_GPR22,
>> +	PERF_REG_POWERPC_GPR23,
>> +	PERF_REG_POWERPC_GPR24,
>> +	PERF_REG_POWERPC_GPR25,
>> +	PERF_REG_POWERPC_GPR26,
>> +	PERF_REG_POWERPC_GPR27,
>> +	PERF_REG_POWERPC_GPR28,
>> +	PERF_REG_POWERPC_GPR29,
>> +	PERF_REG_POWERPC_GPR30,
>> +	PERF_REG_POWERPC_GPR31,
>> +	PERF_REG_POWERPC_NIP,
>> +	PERF_REG_POWERPC_MSR,
>> +	PERF_REG_POWERPC_ORIG_R3,
>> +	PERF_REG_POWERPC_CTR,
>> +	PERF_REG_POWERPC_LNK,
>> +	PERF_REG_POWERPC_XER,
>> +	PERF_REG_POWERPC_CCR,
>> +#ifdef __powerpc64__
>> +	PERF_REG_POWERPC_SOFTE,
>> +#else
>> +	PERF_REG_POWERPC_MQ,
>> +#endif
>> +	PERF_REG_POWERPC_TRAP,
>> +	PERF_REG_POWERPC_DAR,
>> +	PERF_REG_POWERPC_DSISR,
>> +	PERF_REG_POWERPC_RESULT,
>> +	PERF_REG_POWERPC_MAX,
>> +};
>> +#endif /* _ASM_POWERPC_PERF_REGS_H */




Thanks
Anju

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