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Message-Id: <1445332264-6054-1-git-send-email-wxt@rock-chips.com>
Date: Tue, 20 Oct 2015 17:11:00 +0800
From: Caesar Wang <wxt@...k-chips.com>
To: Eduardo Valentin <edubezval@...il.com>,
Heiko Stuebner <heiko@...ech.de>
Cc: Dmitry Torokhov <dmitry.torokhov@...il.com>, dianders@...omium.org,
Caesar Wang <wxt@...k-chips.com>, devicetree@...r.kernel.org,
linux-pm@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
linux-kernel@...r.kernel.org,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
linux-rockchip@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Pawel Moll <pawel.moll@....com>,
Zhang Rui <rui.zhang@...el.com>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@....linux.org.uk>
Subject: [PATCH 0/4]
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.
Says:
The TSHUT temperature is setting more than 80 degree, the default
tshut polarity is HIGH.
If T > 80C, the OTP output the High Signal.
If T < 80C, the OTP output the Low Signal.
On the moment, the TSADC controller is reset, the tshut polarity will be
Low in a short period of time.
So:
If T < 80C, the OTP output the High Signal.
If T > 80C, the OTP output the Low Signal.
In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can
accept the reset response time to avoid this issue.
In other words, the system will be always reboot if we make the OTP pin
is connected the others IC to control the power.
Tested on box board.
Caesar Wang (4):
dt-bindings: Sync the dts to this document
thermal: rockchip: ensure the otp state before resetting the
controller
thermal: rockchip: change the TSHUT default state
ARM: dts: rockchip: Add the OTP gpio pinctrl
.../bindings/thermal/rockchip-thermal.txt | 5 ++--
arch/arm/boot/dts/rk3288.dtsi | 9 ++++--
drivers/thermal/rockchip_thermal.c | 34 +++++++++++++++++++++-
3 files changed, 43 insertions(+), 5 deletions(-)
--
1.9.1
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