| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1445332391-30530-3-git-send-email-chaotian.jing@mediatek.com>
Date: Tue, 20 Oct 2015 17:13:04 +0800
From: Chaotian Jing <chaotian.jing@...iatek.com>
To: Ulf Hansson <ulf.hansson@...aro.org>
CC: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Seungwon Jeon <tgih.jun@...sung.com>,
Jaehoon Chung <jh80.chung@...sung.com>,
Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Barry Song <baohua@...nel.org>,
Hans de Goede <hdegoede@...hat.com>,
Chaotian Jing <chaotian.jing@...iatek.com>,
Lars-Peter Clausen <lars@...afoo.de>,
Javier Martinez Canillas <javier.martinez@...labora.co.uk>,
Sascha Hauer <s.hauer@...gutronix.de>,
Howard Chen <ibanezchen@...il.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Kristina Martsenko <kristina.martsenko@...il.com>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Minda Chen <Minda.Chen@....com>,
Dong Aisheng <b29396@...escale.com>,
Johan Derycke <johan.derycke@...co.com>,
Haibo Chen <haibo.chen@...escale.com>,
Fabio Estevam <fabio.estevam@...escale.com>,
Georgi Djakov <georgi.djakov@...aro.org>,
<ivan.ivanov@...aro.org>, Weijun Yang <Weijun.Yang@....com>,
Kevin Hao <haokexin@...il.com>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <linux-mmc@...r.kernel.org>,
<linux-samsung-soc@...r.kernel.org>, <srv_heupstream@...iatek.com>
Subject: [PATCH v2 2/9] mmc: dt-bindings: update Mediatek MMC bindings
Add 400Mhz clock source for HS400 mode
Signed-off-by: Chaotian Jing <chaotian.jing@...iatek.com>
---
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
index a1adfa4..0120c7f 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
@@ -17,6 +17,11 @@ Required properties:
- vmmc-supply: power to the Core
- vqmmc-supply: power to the IO
+Optional properties:
+- assigned-clocks: PLL of the source clock
+- assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
+- hs400-ds-delay: HS400 DS delay setting
+
Examples:
mmc0: mmc@...30000 {
compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
@@ -24,9 +29,13 @@ mmc0: mmc@...30000 {
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
vmmc-supply = <&mt6397_vemc_3v3_reg>;
vqmmc-supply = <&mt6397_vio18_reg>;
- clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
+ clocks = <&pericfg CLK_PERI_MSDC30_0>,
+ <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
clock-names = "source", "hclk";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
+ assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
+ hs400-ds-delay = <0x14015>;
};
--
1.8.1.1.dirty
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists