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Message-ID: <20151020160021.374725f3@free-electrons.com>
Date: Tue, 20 Oct 2015 16:00:21 +0200
From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Tawfik Bayouk <tawfik@...vell.com>,
Nadav Haklai <nadavh@...vell.com>,
Lior Amsalem <alior@...vell.com>, Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Gregory Clement <gregory.clement@...e-electrons.com>
Subject: Re: [PATCH 5/5] irqchip: armada-370-xp: document the overall driver
logic
Hello,
On Tue, 20 Oct 2015 15:23:55 +0200, Thomas Petazzoni wrote:
> +/*
> + * Overall diagram of the Armada XP interrupt controller:
> + *
> + * To CPU 0 To CPU 1
> + *
> + * /\ /\
> + * || ||
> + * +---------------+ +---------------+
> + * | | | |
Things are a bit off here.
> + * | per-CPU | | per-CPU |
> + * | mask/unmask | | mask/unmask |
> + * | CPU0 | | CPU1 |
> + * | | | |
> + * +---------------+ +---------------+
> + * /\ /\
and here. So I can fix that up in the next version.
If we're doing ASCII art, let's do it properly.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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