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Message-ID: <CAD=FV=Vo1Wf6opTc5jQjm-nXd=BCJxeggipPj4ER9Ehutxs_6w@mail.gmail.com>
Date: Tue, 20 Oct 2015 09:01:38 -0700
From: Doug Anderson <dianders@...omium.org>
To: Caesar Wang <wxt@...k-chips.com>
Cc: Eduardo Valentin <edubezval@...il.com>,
Heiko Stuebner <heiko@...ech.de>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
Zhang Rui <rui.zhang@...el.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state
Caesar,
On Tue, Oct 20, 2015 at 2:11 AM, Caesar Wang <wxt@...k-chips.com> wrote:
> As the TRM says, the TSHUT default state is high active.
> In general, the TSHUT state can get from the dts. Otherwise
> it gets the state from this.
Can you point at where the TRM says that the default state is high active?
With the manual I have, I look at TSADC_AUTO_CON and I look at the
description of "Bit 8". It says that "tshut polarity" is 0 for low
active and 1 for high active. It then said that the Reset Value is 0.
...the "Reset Value" in tables like this is notoriously unreliable, so
I can totally believe that it's wrong. If you can point me at the
part of the TRM that says that TSHUT is high active by default then I
can confirm that for you. ;)
-Doug
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