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Message-ID: <20151021192923.GR5105@linux.vnet.ibm.com>
Date: Wed, 21 Oct 2015 12:29:23 -0700
From: "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Boqun Feng <boqun.feng@...il.com>,
Will Deacon <will.deacon@....com>,
Michael Ellerman <mpe@...erman.id.au>,
linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
Anton Blanchard <anton@...ba.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v2] barriers: introduce smp_mb__release_acquire and
update documentation
On Wed, Oct 21, 2015 at 10:24:52AM +0200, Peter Zijlstra wrote:
> On Tue, Oct 20, 2015 at 04:34:51PM -0700, Paul E. McKenney wrote:
> > There is also the question of whether the barrier forces ordering
> > of unrelated stores, everything initially zero and all accesses
> > READ_ONCE() or WRITE_ONCE():
> >
> > P0 P1 P2 P3
> > X = 1; Y = 1; r1 = X; r3 = Y;
> > some_barrier(); some_barrier();
> > r2 = Y; r4 = X;
> >
> > P2's and P3's ordering could be globally visible without requiring
> > P0's and P1's independent stores to be ordered, for example, if you
> > used smp_rmb() for some_barrier(). In contrast, if we used smp_mb()
> > for barrier, everyone would agree on the order of P0's and P0's stores.
>
> Oh!?
Behold sequential consistency, worshipped fervently by a surprisingly
large number of people! Something about legacy proof methods, as near
as I can tell. ;-)
> > There are actually a fair number of different combinations of
> > aspects of memory ordering. We will need to choose wisely. ;-)
> >
> > My hope is that the store-ordering gets folded into the globally
> > visible transitive level. Especially given that I have not (yet)
> > seen any algorithms used in production that relied on the ordering of
> > independent stores.
>
> I would hope not, that's quite insane.
Your point being? ;-)
Thanx, Paul
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