linux-kernel - [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

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Message-ID: <1445515359-8587-3-git-send-email-dawei.chien@mediatek.com>
Date:	Thu, 22 Oct 2015 20:02:39 +0800
From:	Dawei Chien <dawei.chien@...iatek.com>
To:	Viresh Kumar <viresh.kumar@...aro.org>
CC:	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Daniel Kurtz <djkurtz@...omium.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Dawei Chien <dawei.chien@...iatek.com>,
	<devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
	<linux-mediatek@...ts.infradead.org>,
	<srv_heupstream@...iatek.com>, Sascha Hauer <kernel@...gutronix.de>
Subject: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

Add thermal zone node to mt8173.dtsi.

Signed-off-by: Dawei Chien <dawei.chien@...iatek.com>
---
This patch is base on
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 ++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3b18f37..eaf12bf 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -16,6 +16,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/mt8173-power.h>
 #include <dt-bindings/reset-controller/mt8173-resets.h>
+#include <dt-bindings/thermal/mt8173.h>
 #include "mt8173-pinfunc.h"
 
 / {
@@ -54,6 +55,18 @@
 			reg = <0x000>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				859000  43
+				908000  52
+				983000  86
+				1009000 123
+				1028000 138
+				1083000 172
+				1110900 180
+				1125000 192
+			>;
+			dynamic-power-coefficient = <263>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu@1 {
@@ -62,6 +75,17 @@
 			reg = <0x001>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				859000  43
+				908000  52
+				983000  86
+				1009000 123
+				1028000 138
+				1083000 172
+				1110900 180
+				1125000 192
+			>;
+			dynamic-power-coefficient = <263>;
 		};
 
 		cpu2: cpu@100 {
@@ -70,6 +94,18 @@
 			reg = <0x100>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				828000  72
+				867000  90
+				927000  156
+				968000  181
+				1007000 298
+				1049000 435
+				1089900 533
+				1125000 533
+			>;
+			dynamic-power-coefficient = <530>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@101 {
@@ -78,6 +114,17 @@
 			reg = <0x101>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				828000  72
+				867000  90
+				927000  156
+				968000  181
+				1007000 298
+				1049000 435
+				1089900 533
+				1125000 533
+			>;
+			dynamic-power-coefficient = <530>;
 		};
 
 		idle-states {
@@ -116,6 +163,49 @@
 		clock-output-names = "clk32k";
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu_thermal {
+			polling-delay-passive = <1000>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+
+			thermal-sensors = <&thermal MT8173_THERMAL_ZONE_CA57>;
+			sustainable-power = <1500>;
+
+			trips {
+				threshold: trip-point@0 {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				target: trip-point@1 {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_crit: cpu_crit@0 {
+					temperature = <115000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map@0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 0 0>;
+					contribution = <1024>;
+				};
+				map@1 {
+					trip = <&target>;
+					cooling-device = <&cpu2 0 0>;
+					contribution = <2048>;
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&gic>;
-- 
1.7.9.5

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