linux-kernel - Re: Generic DT binding for IPIs

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Message-ID: <CAL_JsqKb3VFyo+xrWeC99-z=xhKbei0=cETU=Nip79K1xU6FSw@mail.gmail.com>
Date:	Thu, 22 Oct 2015 08:43:53 -0500
From:	Rob Herring <robh+dt@...nel.org>
To:	Qais Yousef <qais.yousef@...tec.com>
Cc:	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Marc Zyngier <marc.zyngier@....com>,
	Jiang Liu <jiang.liu@...ux.intel.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Generic DT binding for IPIs

On Wed, Oct 14, 2015 at 5:18 AM, Qais Yousef <qais.yousef@...tec.com> wrote:
> Hi,
>
> This is an attempt to revive a discussion on the right list this time with
> all the correct people hopefully on CC.

devicetree-spec would be more appropriate list for something like this.

> While trying to upstream a driver, Thomas and Marc Zyngier pointed out the
> need for a generic IPI support in the kernel to allow driver to reserve and
> send ones. Hopefully my latest RFC patch will help to clarify what's being
> done.
>
>     https://lkml.org/lkml/2015/10/13/227
>
> We need a generic DT binding support to accompany that to allow a driver to
> reserve an IPI using this new mechanism.
>
> MarcZ had the following suggestion:
>
>     https://lkml.org/lkml/2015/8/24/628
>
> Which in summary is
>
>         mydevice@...00000 {
>                 interrupt-source = <&intc INT_SPEC 2 &inttarg1 &inttarg1>;

What is INT_SPEC and "2"? A drawing of the h/w connections and then
what the binding looks like would be helpful.

>         };
>
>         inttarg1: mydevice@...00000 {
>                 interrupt-sink = <&intc HWAFFINITY1>;

What is HWAFFINITY1? I want to be able to see if say this value is 1,
then the affinity is for cpu0.

>         };
>
>         inttarg2: cpu@1 {
>                 interrupt-sink = <&intc HWAFFINITY2>;
>         };
>
>
> interrupt-sink requests to reserve an IPI that it will receive at HWAFFINITY
> cpumask. interrupt-source will not do any reservation. It will simply
> connect an IPI reserved by interrupt-sink to the device that will be
> responsible for generating that IPI. This description should allow
> connecting any 2 devices.
> Correct me Marc if I got it wrong please.
>
> I suggested a simplification by assuming that IPIs will only be between host
> OS and a coprocessor which would gives us this form which I think is easier
> to deal with
>
>         coprocessor {
>              interrupt-source = <&intc INT_SPEC COP_HWAFFINITY>;
>              interrupt-sink = <&intc INT_SPEC CPU_HWAFFINITY>;
>         }
>
>
> interrupt-source here reserves an IPI to be sent from host OS to coprocessor
> at COP_HWAFFINITY. interrupt-sink will reserve an IPI to be received by host
> OS at CPU_HWAFFINITY. Less generic but I don't know how important it is for
> host OS to setup IPIs between 2 external coprocessors and whether it should
> really be doing that.

Could we use the existing interrupts binding for interrupt-sink?

>
> What do the DT experts think? Any preference or a better suggestion?

Depends how you would assign coproc to coproc IPIs in a system. It may
be fixed in firmware, or more complex coprocs may read the dtb.

Rob
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